a) Design the following circuit to establish a dc drain current ID = 0.5 mA (VDD = 15V) The MOSFET has Vt = 1 V, lambda = 0, and K
It is required to design the circuit of Fig. 6.48(c) to establish a dc drain current ID = 0.5 mA. The MOSFET is specified to have Vt = 1 V and kn
Design the circuit to stablish a DC drain current ID = 0.5 mA. The MOSFET is specified to have Vt = 1 V and kn
Design the circuits below such that ID =2mA and VD = 5V. VTHN = 1 V, unCox = 100 uA/V2.
Calculate the maximum allowable gate voltage in the circuit below for transistor M1 to stay in Saturation. Assume Vtn = 0.5 V, μnCox = 200 μA/V2, and λ = 0 V−1 .
For the circuit below, find the maximum value of RD for transistor M1 to remain in saturation. Assume Vtn = 0.5 V, unCox = 200uA/V2, W/L = 5/0.18 and lambda = 0 V-1.
For the current-mirror circuit shown on the left hand side, please answer the following questions. All the respective sizes of the transistors are given in the figure. Assume that Vtn = 1 V, kn = 5 mA/V2 for a unit size of NMOS which is (W/L). a) Find the value of Vg and lout. b) What is the required bias voltage Vb in order to maximize the output voltage swing? What is the minimum output voltage? c) Find the value of Rout. (Assume that VA = 50 V for NMOS)