a) Find the logic expression for Z. What function does this circuit implement? b) Draw the pull-up network that completes the CMOS logic circuit. c) Assume that the equivalent inverter has an NMOS transistor with a minimum size of 2 um/250 nm. Determine the equivalent PMOS transistor dimensions (W/L) that ensure tPHL = tPLH for the equivalent inverter. d) Find the NMOS and PMOS transistor dimensions in the CMOS logic circuit so that the propagation delays are equal to the value you found for the inverter in c) for the worst case, assuming an equal load capacitance for both the inverter and the logic circuit. Vtn = 0.8 V, Vtp = -0.9 V, unCox = 250 uA/V2, upCox = 120 uA/V2 is given. The pull-down section of a CMOS logic circuit is shown below.
A pull-up network of a CMOS logic circuit is depicted in below figure. It is given that the (W/L) ratios of the nMOS and pMOS transistors of a matched inverter are (W/L)n = 1 and (W/L)p = 4, respectively. If worst case propagation delays, tpLH and tnHL of the CMOS circuit are approximately equal to those of the matched inverter, the (LW) ratio of the nMOS of input C in the pull down network is (1 mark) Note that the W/L ratios of all the nMOS transistors must be in integer and in smallest possible sizes. Answer: (Please answer in integer number, e.g. 10)
For process technology with L = 1.2 um, n = 1.5, p = 4.5, give the sizes of all transistors in: -Four-input NOR and -Four-input NAND gates. Also give the relative areas of the two gates. is the same for NMOS and PMOS Fig. 13.16 Proper transistor sizing for a four-input NOR gate. Note that n and p denote the (W/L) rations of QN and QP, respectively, of the basic inverter. Fig. 13.17 Proper transistor sizing for a four-input NAND gate. Note that n and p denote the (W/L) rations of QN and QP, respectively, of the basic inverter.
For the PMOS differential amplifier shown in Fig. P8.2 let Vtp = -0.8 V and kp'W/L = 4 mA/V^2. Neglect channel-length modulation. (a) For VG1 = VG2 = 0V, find Vov and VGS for each of Q1 and Q2. Also find Vs, VD1, and VD2. (b) If the current source requires a minimum voltage of 0.5 V, find the input common-mode range.