An NMOS transistor fabricated in a process for which the process transconductance parameter is 400 uA/V^2 has its gate and drain connected together. The resulting two-terminal device is fed with a current source I as shown in Fig. 1. With I = 40 uA, the voltage across the device is measured to be 0.6 V. When I is increased to 90 uA, the voltage increases to 0.7 V. Find Vt and (W/L) of the transistor. Ignore channel-length modulation.
The NMOS and PMOS transistors in the circuit of Fig. for Q. 6(b) are matched with kn'(Wn/Ln) = kp'(Wp/Lp) = 1 mA/V^2 and Vtn = -Vtp = 1 V. Assuming λ = 0 for both devices, find the drain currents iDN, iDP and the voltage vo for vl = 1 V.
A CS amplifier utilizes a MOSFET with unCox = 400 uA/V^2 and W/L = 10. It is biased at ID = 320 uA and uses RD = 10 kohm. Find Rin, Avo, and Ro. Also, if a load resistance of 10 kohm is connected to the output, what overall voltage gain Gv is realized? Now, if a 0.2-V peak sine-wave signal is required at the output, what must the peak amplitude of vsig be?
A CS amplifier utilizes a MOSFET biased at ID = 0.25 mA with VOV = 0.25 V and RD = 20 kohm. The amplifier is fed with a signal source having Rsig = 100 kohm, and a 20-kohm load is connected to the output. Find Rin, Avo , Ro, Av , and Gv . If, to maintain reasonable linearity, the peak of the input sine-wave signal is limited to 10% of 2Vov , what is the peak of the sine-wave voltage at the output?