Question 8: Use the following parameters for below circuit: unCox = 100 uA/V^2, upCox = 50 uA/V^2, (W/L)1 = 10 (W/L)2 = 20 ( W/L)3 = 40 (W/L)4 = 20 VG = 1 V. The threshold voltages VTH for both PMOS and NMOS is 0.4 V. Ignore channel length modulation (ro is very high). Calculate: a) Find the DC voltage of the output node, VOUT (Hint: Find the DC voltage at Node X first) b) Find the expression and the numerical value of the total voltage gain.
The circuit shown below shows a PMOS transistor operating as a switch. Knowing that the power supply VDD = 2.5 V ensures the High level, Vtp = -0.7 V, Kp = 200 uA/V^2, CL = 10pF, Determine: 1. The end value of VO when VI changes from Low to High 2. The end value of VO when VI changes from High to Low. 3. The propagation delay tpLH
Figure P18.7 shows a PMOS transistor operating as a switch in the on position. (a) If initially vO= 0 and at t = 0, vI is raised to VDD, what is the final value VoH reached at the output? (b) If initially vO = VDD and at t = 0, vI is lowered to 0 V, what is the final value VOL reached at the output? (c) For the situation in (a), find tPLH for vO to rise from 0 to VDD/2. Let kp = 125 uA/V^2, VDD = 1.2 V, and |Vtp| = 0.4 V.