• Electrical Engineering Archive: Questions from 2023-09-2

    The NMOS transistor in the CS amplifier circuit of the figure is biased to have gm = 4 mA/V. a)Find AM, fP1, fP2, fP3, and fL. (Assume the largest pole value as fL) b)Assume that the same amplifier is biased to have gm = 1 mA/V, ro = 100 kohm, Cgs = 1 pF, Cgd = 0.2 pF, Find AM and fH. (Use Miller approximation.) Draw the frequency response.
    1 answer

    The NMOS transistor in the CS amplifier circuit of the figure is biased to have gm=9.9mA/V. Internal capacitances are Cgs=0.1pF, Cgd=1.3pF. (Ignore ro ) a) Find fL (Select the highest pole as your fL ) b)Find fH (Use Miller approximation.)
    1 answer

    Consider a CMOS inverter with the following parameters: nMOS VT0,n = 0.6 V unCox = 60 uA/V2 (W/L)n = 8 pMOS VT0,P = -0.7 V upCox = 25 uA/V2 (W/L)p = 12 Calculate the noise margins and the switching threshold (Vth) of this circuit. The power supply voltage is VDD = 3.3 V.
    1 answer