Consider the circuit shown in Figure 1; note that the numerical value of Vbias is not needed for this problem. Figure 1. Circuit for Problem 1. Here, current source Ibias = 13mA and NMOS devices M1 and M2 have the following properties: • W1 = W2 = 13µm, L1 = L2 = 1µm, kn’ = 500µA/V2 , and VT = 1 V. • The body effect and channel-length modulation effect for devices M1 and M2 should be neglected for this problem. a) If VDD = 5V, determine the numerical value of output current Iout. . Show your work and include appropriate units with your numerical answer. b) If VDD = 5V, determine the numerical value of node voltage Vx. Show your work and include appropriate units with your numerical answer. c) Determine VDDmin, the minimum numerical value of VDD which ensures that device M2 is in saturation. Show your work and include appropriate units with your numerical answer.
CS Amplifiers vs. CG Amplifiers [19 points] (a) (b) Fig. P2 All NMOS transistors are biased at saturation region, but only small-signal equivalent circuits are shown in the figures. Each individual NMOS transistor has C2d = 0.1•Cgs, Cdb = Csb = 0.2•Cgs and intrinsic gain gmr0 = 40(>>1). However, the transistor is used as a CS amplifier in Fig. P2(a), but a CG amplifier in Fig. P2(b). Note that the intrinsic output impedance, r8, of the NMOS transistor still exists even though the value of Rsig and RL. have been assigned as rd/2 and re, respectively. For the following questions, please include device capacitances Cb, C2 d, Cb, and Cb if necessary. (a) Find the low frequency gain |vo/vi| of the CS amplifier in Fig. P2(a). (b) Use OCTC method only to find the expression of the time-constant, τ1,cs in terms of Cpd and ro, across the gate and source of the NMOS in Fig. P2(a). (c) Use OCTC method only to find the expression of the time-constant, τ22Cs in terms of Cpd and ro, across the drain and source of the NMOS in Fig. P2(a). (d) Use OCTC method only to find the expression of the time-constant, τ3, cs in terms of C84 and ro, across the drain and gate of the NMOS in Fig. P2(a). (e) Based on (b), (c), and (d), find the expression of 3-dB frequency, fucs in terms of Cp4 and rC, of the CS amplifier. (f) Find the low-frequency gain |v9/vi | of the CG amplifier in Fig. P2(b). (g) Use OCTC method only to find the expression of the time-constant, τ1,CG in terms of Cpd and r6, across the source and gate of the NMOS in Fig. P2(b). (h) Use OCTC method only to find the expression of the time-constant, τ2CG in terms of C84 and ro, across the drain and gate of the NMOS in Fig. P2(b). (i) Based on (g) and (h), find the expression of 3-dB frequency, f fh,co in terms of CBd and r0, of the CG amplifier. (j) Based on (a) and (f), find the ratio of low-frequency gains, |Av,co/Av, cs|. (k) Based on (c) and (i), find the ratio of 3-dB frequencies, fH,co/fH,cs. Result Summary: (a) Av,Cs = (b) τ1,Cs = (c) τ2,Cs = (d) τ3,Cs = (e) fH,CS = (f) Av,CG = (g) τ1,CG = (h) τ2,CG = (i) fH,CG = (j) |Av,CG/Av,CS| = (k) fH,CG/fH,CS =
The circuit shown in figure (2) utilizes an ideal transformer and it operates in the steady-state condition at 100 Hz. The circuit operates such that the impedance Zs dissipates the maximum possible power. Answer the following: a) Define the characteristics of the ideal transformer b) Calculate the currents I1 and I2 and voltage Vo all in phasor and sinusoidal forms. c) Calculate the complex power supplied by the voltage source and its operating power factor. Then drew the complex power triangle.
NMOS devices of a 2-input NOR gate are to be sized for TPHL = 30ps and CL = 20fF. Which of the following is the best estimate of their drawn width? (a) WDR(N) = 325 nm. (b) WDR(N) = 200 nm. (c) WDR(N) = 2.00 µm. (d) WDR(N) = 112 nm. (e) WDR(N) = 1.22 µm. (f) WDR(N) = 590 nm.
A transconductance amplifier with input Vs and output Io is shown in Fig. 2. The transistor is specified in terms of gm and ro. Neglect the body effect. (a) (4 points) Sketch the small-signal equivalent circuit using the hybrid-π model of the MOSFET. (b) (8 points) Show the output resistance is given by Rout = ro + RS + gmroRS. (c) (8 points) Derive the expression for Gm ≡ Io/Vs Vout = 0 in terms of gm, ro, and RS.
a) Consider the NMOS differential amplifier given in Fig. 2. Assume VDD = 12 V. Determine the value of Ro to set the current IOQ = 1 mA when V1 = V2 = 0 (KN = 0.43 mA/V2, VTN = 1.2 V) . Fig. 2. NMOS Differential Amplifier b) Determine the value of R1 to set VDSQ = 8 V.
Find the number of 74LS inputs that can be connected to the output of a 74AS gate. b) Which logic family gate inputs can be connected a 74H gate output without the need of any additional circuit? Explain your answer. c) Can a 74H gate output be connected to three 74AS gate inputs directly? Why? d) If a load is connected to the output of a 74 gate in the current source configuration, what is the maximum current that this load can draw from the gate? Refer to the following table to answer the questions below and show your work: Parameters 74H CMOS 74 TTL 74LS TTL 74AS TTL 74ALS TTL VIH 3.5 V 2 V 2 V 2 V 2 V VIL 1 V 0.8 V 0.8 V 0.8 V 0.8 V VOH 4.9 V 2.4 V 2.7 V 2.7 V 2.7 V VOL 0.1 V 0.4 V 0.4 V 0.4 V 0.4 V 1µA 40µA 20µA 200µA 20µA IL -1µA -1.6 mA -400µA -2 mA -100µA IOH -4mA -400µA -400µA -2mA -400µA IOL 4 mA 16 mA 8 mA 20 mA 4 mA