Consider the shown circuit Part 1: Hand Calculation Assume that VBE(on) = 0.7 V, VBE( sat ) = 0.8 V, VCE( sat ) = 0.1 V, forward βF = 25, reveres βR = 0.1, a) Fill in the table below, what is the logic gate? Vx Vx Qx Qx Q1 Q2 Q Vout 0.1 V 0.1 V 0.1 V 5 V 5 V 0.1 V 5 V 5 V b) Assume a 10k load resistor is connected calculate Vout and the output current if: Vx = Vx = 0.1 V Vx = Vy = 5 V c) Calculate the power drawn from the supply volt-age VCC if: Vx = Vx = 0.1 V Vx = Vx = 5 V Part 2: Simulation Draw the circuit on LTSpice a) Verify the results obtained in part (a) of the hand calculation using DC operating point analysis b) Set Vx = 0 V and use DC sweep analysis varying Vy from 0 to 5 V. Draw the voltage transfer characteristics (VTC) c) Set Vx=0V, and set Vy to be a pulse with the parameters: Vinitial = 0, Von=5, Tdelay = 2 ns, Trise = 1 ns, Tfall = 1 ns, Ton=5ns, and perform transient analysis for 10ns, plot Vy and Vout and measure the delays tpHL and tpLH (measure the delays from the start of the input pulse to the point when Vout reaches VOH or VOL) Notes: Homework submission is through the Moodle platform Submit a single compressed file containing: The hand calculations Screenshot showing the circuit and the simulation results The schematic file (.asc) The netlist file (.net)