*D10.45 The MOSFET current-source circuit in Figure P10.44 is biased at V+ = 2.0 V. The transistor parameters are VTN = 0.5 V, kn′ = 80 μA/V2, and λ = 0.015 V −1. (a) Design the circuit such that IREF = 50 μA and the nominal bias current is IO = 100 μA. (b) Find the output resistance Ro. (c) Determine the percentage change in IO for a change in drain-to-source voltage of ΔVDS2 = 1 V. Figure P10.44
Consider the same circuit as in HW8, Problem #7 (which is the same as the lecture notes) with transistor M1 having k = 3 mA/V2 and VT = 1 V. a) For VGS = 2 V, RD = 1 kΩ (default case), calculate gm and AV (the small-signal input/output gain). b) For VGS = 2.5 V, RD = 1 kΩ (i.e. HW8, #7b), calculate gm and AV. c) For VGS = 2 V, RD = 2.67 kΩ (i.e. HW8, #7c), calculate gm and Av. d) Which of the above three cases yields the largest gm? Largest Av? e) What parameters are most important for increasing the gain Av? f) For each of the above three cases, what is the maximum allowable small-signal input voltage amplitude to avoid nonlinearity? (assume "10x" for the small-signal condition) g) What parameters are most important for increasing the maximum allowable input signal amplitude? h) Referring back to 1(a), if the total input signal is vin(t) = vGS(t) = 2+0.2cos(ωt)(V), write an equation for the output voltage vout(t) = vDS(t). Draw (or plot on a computer) the input waveform and output waveforms (assume linear operation).