Given VDD = VSS = 15V, Given gm1 = gm2 = 3.8 mS, ro1 = ro2 = 7.3 Kohm, RD = 2.0 kohm, R1 = 87 Kohm, R2 = 23 Kohm, and R3 = 19 Kohm, determine the CMRR of the OpAmp in dB
D 8.7 The current-steering circuit of Fig. P8.7 is fabricated in a CMOS technology for which μnCox = 400 μA/V2, μpCox = 100 μA/V2, Vtn = 0.5 V, Vtp = −0.5 V, VAn′ = 6 V/μm, and |VAp′| = 6 V/μm. If all devices have L = 0.5 μm, design the circuit so that IREF = 20 μA, I2 = 80 μA, I3 = I4 = 50 μA, and I5 = 100 μA. Use the minimum possible device widths needed to operate the current source Q2 with voltages at its drain as high as + 0.8 V and to operate the current sink Q5 with voltages at its drain as low as −0.8 V. Specify the widths of all devices and the value of R. Find the output resistance of the current source Q2 and the output resistance of the current sink Q5.
Consider INV1 driving INV2. The falling delay tpdf of INV1 increased by 50% after making the PMOS and NMOS of INV2 three times larger than the original value (PMOS: 6 → 18 and NMOS: 2 → 6). Find the unit(s) of the NMOS for INV1. Use the RC delay model.
Consider the MOSFET amplifier shown in the figure. The following parameters are given: VDD = 2.5 V, Vt = 0.5 V, kn = 6 mA/V2, VGS = 0.7 V, RD = 12 kΩ, λ = 0.1 V−1. Analyze the circuit and determine the bias point of the transistor. Then, perform the small-signal analysis and determine the value of the voltage gain Av = vds/vgs. Utilize the provided value of λ only for the small-signal calculations (i.e., ignore λ in the bias analysis).
Design an amplifier using an op-amp to obtain a signal gain of G = −41 V/V to a load (the negative sign in the gain means this is an inverting amplifier). This means that the voltage across a load resistor v L should be G × vs, where vs is the input signal voltage. To design this circuit, all you need to do is pick the appropriate resistance of resistors Rin and Rfb. There is more than one valid solution. An explicit value of vs is not given, and an explicit value of vs is not needed. The answer does not depend on the value of vs - you may assume the output is not saturated. Determine an appropriate value for Rin. Express your answer in kΩ. Determine an appropriate value for Rfb. Express your answer in kΩ.
Find the temperature at which the transistor operates at the edge of active and saturation modes. Presume that the current gain of the transistor is β = 100, the supply voltage is Vs = 10 V, and the thermistor's resistance value varies with the absolute temperature T as 1/T = 1/4000 ln(49R/4444000) + 1/300
(Opamps) Assume that the ideal amplifer (very large gain) "A" has a systematic offset that is represented by the DC voltage at its input, voffset. For an initial condition, set Vinit = 0 across the equally sized capacitors (no charge stored across the capacitors). Vin is a DC voltage. (a) If voffset = 0.01vin, what is the percentage error of the input-referred DC voltage induced by v offset relative to Vin? (7.5 pts)
Given VDD = VSS = 15 V, Given gm1 = gm2 = 3.6 mS, ro1 = ro2 = 8.7 Kohm, RD = 3.8 kohm, R1 = 152 Kohm, R2 = 28 Kohm, and R3 = 9 Kohm, determine the CMRR of the OpAmp in dB Selected Answer: [None Given] Correct Answer: 51.6 ± 3%
Given VDD = VSS = 15 V, gm1 = gm2 = 2.9 mS, gm3 = 11 mS, gm4 = 13 mS, ro1 = ro2 = 10 Kohm, ro3 = 17 Kohm, ro4 infinity RD = 2.4 kohm, R1 = 74 Kohm, R2 = 45 Kohm, and R3 = 13 Kohm, RL = 2 Kohm, determine overall differential mode gain Adm in dB Selected Answer: [None Given] Correct Answer: 51.2 ± 5%
Consider the circuit shown in the figure. This is an amplifier in which the load resistor RD has been replaced with another NMOS transistor Q2 in the diode configuration. Note that the two transistors conduct equal drain currents. Assuming that Q1 is operated in saturation, find the small-signal voltage Av = vo/vi of the amplifier. The following parameters are given (W/L)1 = 24 μm/0.5 μm, (W/L)2 = 1.5 μm/0.5 μm. You can ignore the influence of λ in the analysis (i.e., assume λ = 0). Type in the value of the small-signal voltage gain, without the unit (V/V), paying attention to the polarity.
For the differential amplifier of Fig. 9.15(a) let I = 0.2 mA, VCC = VEE = 1.5 V, VCM = −0.5 V, RC = 5 kΩ, and β = 100. Assume that the BJTs have VBE = 0.7 V at ic = 1 mA. Find the voltage at the emitters and at the outputs.
Design (choose RE) the following BJT differential amplifier for a differential gain where the output is taken single-ended with common mode input (vo1/vid), so that, Adc = −1/2[gmRc] = −10 V/V. The resistance Rc = R1 = R2 = 1K. VBEon = 1 V and β = 100. Find the differential gain Ad and the dB CMRR (Adc/Ad). Assume V1=V2 =0V.