7.24 The parameters of the transistor in the circuit in Figure P7.24 are VBE( on ) = 0.7 V, β = 100, and VA = ∞. (a) Determine the quiescent and small-signal parameters of the transistor. (b) Find the time constants associated with CC1 and CC2. (c) Is there a dominant −3 dB frequency? Estimate the −3 dB frequency. Figure P7.24
Problem 3 - A CB amplifier circuit is shown with β = 100, rπ = 2.5 KOhms, RS = 75 Ohms, RC = 10 KOhms, and r0 very large. A) For RB = 0 find Rin, Av = vo/vs, and Rout. B) Repeat Part A for RB = 20 KOhms.
Figures 3.1 and 3.2 show CE and CB BJT amplifier configurations, respectively. While the biasing is not shown completely, assume that the transistors are biased in active mode. Assuming IC, the bias current through collector of both amplifiers, is 1 mA, VT = 25 mV, β = 100, RC = 1 KΩ and ro = ∞ : (a) Draw the small signal equivalent circuits for both circuits. (b) Calculate Rin for both circuits. (c) Calculate the mid-band gain AM = vo/vsig in each case as a function of Rsig , clearly indicating the methods. (d) Comment on the key differences between the two configurations in Figure 3.1 and Figure 3.2 in terms of their applications. Figure 3.1 Figure 3.2
Consider the CB amplifier shown below designed using the same type of biasing as the problem above. You can use all small signal quantities such as gm, rπ, re calculated in the previous problem here as well. Let Rsig = RL = 5 kΩ. Find the expressions and calculate values of Rin, Ro, Avo, Av, vi/vsig, and Gv. To what value should Rsig be reduced (usually not possible to do!) to obtain an overall voltage gain equal to that found for the typical CE amplifier of about 39 V/V ? (Ans. 25 Ω; 8 kΩ; +320 V/V; +123 V/V; 0.005 V/V; 0.6 V/V; 54 Ω)
For the circuit below, find the value of the current I that results in Rin = Rsig. . Also, find the voltage gain vo/vsig . Assume that the source provides a small signal vsig and that β = 100. This is actually a form of CB amplifier, with the 100 kΩ resistor in parallel with the 15 kΩ in the small-signal model.
The common-base amplifier has the properties: β = 120, VBE(on) = 0.7 V, VA = ∞, and ICQ = 1.25 mA. Note that the input is on the right and the output is on the left. a. (3 pts. ) Find the small-signal parameters rπ, r0, and gm. b. (5 pts. ) Sketch the small-signal equivalent circuit. c. (5 pts. ) Calculate the voltage gain Av = V0 Vi. d. (5 pts. ) Calculate the current gain Ai = I0 Ii.
The inverter circuit shown uses a device X with graphical characteristics consisting of two straight lines (see graph on right): one through the origin and the point (VA, IA), and the other a horizontal line at ix = IA, starting at vx = VA. The MOSFET parameters are: k = 1.6 mA/V2 and Vt = 0.7 V. The supply voltage is VDD = 4 V, and for device X, VA = 0.5 V. Find the value of VOH in V. a) 4.5 b) 3.5 c) 4.0 d) 5.0 e) 3.0 Find the value of VOL in V, when IA = 1 mA. a) 0.233 b) 0.168 c) 0.148 d) 0.195 e) 0.290 In the following three questions, assume that the value of IA is adjusted such that it results in VOL = 0.2 V. Hint: When the output is low, IA = 12 k(2(VOH − Vt)VOL − VOL2) 3. Find the average static power dissipation (in mW ) when the input is low 50% of the time, and high 50% of the time. a) 1.51 b) 1.06 c) 2.05 d) 3.36 e) 2.66 4. Find the value of VM in V (at vI = VM, vO = VM ). a) 1.64 b) 2.00 c) 1.83 d) 1.92 e) 1.74 5. Find the high-to-low propagation delay ( tPHL in ns ) when a 1 pF capacitor is connected between the output of the inverter and ground. Use the average capacitor current method. a) 0.249 b) 0.212 c) 0.185 d) 0.380 e) 0.301
Q2) Fig. 2 shows the circuit and the corresponding load line and characteristics of a resistor loaded NMOS inverter. The NMOS inverter operates at the edge-of-saturation (EOS) as shown in Fig. 2 b. Fig. 2 2.1) Determine the threshold voltage of the NMOS, VTN. 2.2) Determine the conduction parameter of the NMOS, Kn 2.3) Calculate VDD and RL 2.4) Find the dissipated-power in the NMOS only. 2.5) Does the decrease of VIN move the operating point toward the saturation region? Explain.
For an OPAMP with VDD = 3.3 V and input common-mode voltage (VCM) = VDD2, the MOSFET model parameters are listed in page B-9 of Appendix B on Smith's CD. (1) As shown in Fig. 1, please calculate vo vid(s) with its DC gain and pole locations, where vid = vin+ − vin−. (refer to Sections 8.5.3 and 9.7.2 in textbook). Then verify your results by PSpice with 0.5 μm CMOS model (in sedra_lib. lib). The sizes of all MOSFETs are listed below. (W/L)M1, M2 = 12 μm/0.5 μm (W/L)M5 = 2.5 μm/0.5 μm (W/L)M3, M4 = 5 μm/0.5 μm (W/L)M6 = 0.75 μm/0.5 μm