Q6. The network in figure below operates at a resonant frequency of ω = 2000 rad/s. Select the values for the unknown circuit elements so that the circuit has a Q = 50. Then find the value of the voltage across the capacitor. L = mH R = Ohm VC = ∠ V (phasor)
Expressively find the voltage gain, input and output resistances in the circuit shown in the figure. For all transistors VA < ∞. What are the advantages of choosing transistor Q4 as mosfet and transistor Q1 as bjt?
Figure Q1 shows a common-emitter amplifier. The gain of the transistor Q1 is given by β = 100 , the resistances are given by RS = 500 Ω, RI = 1 MΩ, R2 = 1 MΩ, RC = 10 kΩ, RE = 10 kΩ and RL = 1 kΩ, and the internal capacitances are given by Cμ = 2 pF and Cπ = 20 pF. Assume that the internal resistances rb = 10 Ω, rμ = ∞, ro = ∞ and the external capacitances CS, CE and CL are large. Figure Q1 a) If the supply voltage, VCC, is 12 V, compute the collector current, IC, hybrid- π parameters, gm and rπ for the transistor Ql. [8 Marks] b) Sketch the small-signal equivalent circuit in a form suitable for high frequency analysis. [3 Marks] c) By using Miller's theorem, calculate the internal capacitances C1 and C2. [6 Marks] d) Sketch the small-signal equivalent circuit again which includes the capacitances C1 and C2. [3 Marks] e) Using open-circuit time constant method, calculate the 3 dB upper corner frequency, fH. [5 Marks]
Please consider the CMOS amplifier of Figure 3. Given that IREF = 50 μA, VX = 1.5 V and λn = λp = 0.0125 V−1. Assume that all NMOS transistors have kn′ = 50 μA/V2, VTN = 1 V and all PMOS transistors have kp′ = 25 μA/V2, VTP = −1 V. Neglect λ for bias calculations. Assume saturation region operation for all transistors. The transistor aspect ratio W/L is given on the figure for each transistor. (Recall: kp′ = Cox⋅μn and kp′ = Cox⋅μp) (30 points). a) Please, find IREF and R. b) Please, find IDQ for each transistor c) Please, find the voltage gain, vo3/vo2. Figure 3
The pMOS transistors, M3, 4 in Fig. 3 are identical, having aspect ratio of W3 /L3. M1 and M2 have aspect ratios of W1/L1 and W2/L1. Neglect channel length modulation for this problem. Assume non-zero current in both the branches. (a) (i) Find out the current in both the branches in terms of μCox, Vtp, Vtn, and W/L of the transistors and R. (ii) What are the transconductances of M1 and M2. (iii) What is the minimum VDD required for this circuit to operate? (iv) Assume that VB is used to bias a common source amplifier (b), whose source is Fig. 3: Problem 3 grounded. Assume M5 is identical to M1. What is the transconductance of M5? How does the transconductance change with a change in mobility of the device? What is the usefulness of this circuit?
Consider the circuit shown below. Assume that both of the transistors are matched, meaning: 1) Kn is the same for both devices M1 and M2, and is equal to 1 mA/V2; 2)VT = 0.5 V for both M1 and M2. Recall that K = Kn(W/L), where W is the length and L is the width of the MOSFET. Further assume that VDD = 3 V and VO is large enough that M2 operates in the saturation regime. a. In what mode does M1 operate and why? b. Find the relationship between IO and IREF in terms of the MOSFET parameters. c. Find VGS if IREF = 10 mA, WI = 10 μm, and LI = 1 μm. d. Find IO under the conditions in part (c) if W2 = 20 μm and L2 = 1 μm. e. What is the minimum value for VO to ensure M2 is in saturation under the conditions of part (d)?
Consider the circuit below where the drain current through M1, M2, and M3 is designed to be 1 mA. Assume VT = 1 V and Kn′ = 2 mA/V2. a) Find the W/L ratio for M2 and the DC voltages at all nodes. b) Draw the small-signal model for the circuit at the operating point you found in part a. Derive an expression for the small-signal gain (A = vo/vi) and evaluate it numerically.
Consider the cascode amplifier shown below. All transistors have their body terminals connected to source terminals. Circuit parameters are as follows: VDD = 5 V, IREF = 160 μA, all transistors have W = 36 μm and L = 0.9 μm, process parameters are: μnCox = 180 μA/V2, μpCox = 60 μA/V2, VTHn = 0.7 V, VTHp = −0.7 V, λ = 0. a) Calculate the dc value of the input voltage vI required to ensure that the dc drain current of transistor M1 is equal to the de drain current provided by the current source. b) Calculate the value of bias voltage VB so that the transistor M1 is biased on the edge of the saturation region. c) Calculate the gain and the output resistance of the amplifier. d) What is the maximum and minimum value of the output voltage for linear amplifier operation, i. e. ensuring that all transistors are operating in the saturation region?
The MOS differential amplifier in this problem is operated at a bias current of IREF = 0.8 mA. M1 and M2 have Kn′ = 0.2 mA/V2 and W/L = 100, RD = 5 kΩ and RSS = 25 kΩ. If the drain resistors have a 1% mismatch, find the small signal differential gain (Ad), the common mode gain (Acm), and the Common Mode Rejection Ratio (CMRR) in dB, defined as 20 log|Ad|/|Acm|. Note, for DC purposes, neglect the effect of RSS and assume that IREF is split equally between the two arms. Do not neglect RSS for small-signal analysis and assume that VCM is set such that gm = 4 mA/V for M1 and M2.
Consider the circuit shown in Figure 1 where VCC is a fixed voltage. The voltage at the base of the transistor, vB(t), is a time varying waveform described by (1). vB(t) = VB + vb(t) Where VB is a DC offset and vb(t) is a time varying, purely AC signal. Suppose the amplitude of vb(t) is A and we make the following assumptions: The capacitor C is sufficiently large so that it can be considered to be a short circuit at the signal frequencies RC and RE are known R ≫ RC vBE = vBE(sat) β ≫ 1 in the active region vBE(sat) and vCE(sat) are known Figure 1: Circuit for Questions 1 - 3.
Consider the current mirror shown in Figure 3, where Iin = 100 μA, each transistor has W/L = 10 μm/0.2 μm and Rs = 1 kΩ. Using the 0.18 μm CMOS devices in Table 1, find rout for the current mirror. Assume the body effect can be approximated by gbs = 0.15gm. Take Id as : Id = μnCox 2(W L)(Vgs − VT) 2 Figure 3
The transistor in the figure below has K = 0.75 mA/V2, and Vto = 1 V. Determine the values of R1 and RS.
In the circuit shown below the voltage, VCC = 10 V, VBB = 2.7 V, RC = 1 kΩ, RB = 100 kΩ. Assume VD(on) = 0.7 V, VBE(on) = 0.7 V, VCE(sat) = 0.2 V, β = 100. Part a. Find current ID1 with VBB = 2.7 V. ID1 = number mA Part b. Now assume VCC = 13.9 V. Find the minimum value of VBB which will put transistor Q1 in saturation. VBB = number (rtol = 0.01, atol = 1 e−05) V
In the circuit of Figure 2, prove that the gain expression of the amplifier is given by : Av = −gm(rds1∥rds) I bias is generated by a current mirror acting as a load. Determine the required Ibias to get the gain of the stage as 15. All transistors have W/L = 12 μm/0.5 μm, rΔ = 1 /λID and device parameters are those of 0.35 μm CMOS process in Table 1. Find the resulting effective gate-source voltage, Veff. Take Id as : Id = μnCox 2 (W L)(Vgs − VT)2 Figure 2