Consider the circuit shown in Fig. 2. Vdd = 5 V and RL = 20 KΩ Assume μnCox = 100 μA/V2 and Vth = 1 V for the transistor M 2. Fig. 2 3) Find the value of VB (in V with an accuracy of two decimal places) for a small signal gain of -10 between vi and vO (refer to Fig. 2). Assume that the transistor M1 is at the junction of saturation and linear region. 1 point 4) Find the W/L of the transistor M1 for a small signal gain of -10 between vi and v0 (refer to Fig. 2). (Transistor is at junction of saturation and linear region). 1 point 5) If vi = VPsin(ω0t), find VB while ensuring maximum possible VP for which M 1 remains in saturation and away from cutoff (Use Qpoint + incremental model for analysis), and ensuring a gain of -10.1 point 6) Using the same conditions given under the question Q5, find W/L of the transistor M1.1 point
Using LTSpice solve the following Problem : 93. Consider the self biased stage shown in Fig. 5.168. Figure 5.168 (a) Determine the bias conditions of Q1. (b) Select the value of C1 such that it operates as nearly a short circuit (e. g., |VP/Vin| ≈ 0.99) at 10 MHz. (c) Compute the voltage gain of the circuit at 10 MHz. (d) Determine the input impedance of the circuit at 10 MHz. (e) Suppose the supply voltage is provided by an aging battery. How much can VCC fall while the gain of the circuit degrades by only 5%?