Consider the common source amplifier shown below. Assume that +VDD = +5 V, −VSS = −5 V, IREF = 300 μA, RL = 1 MΩ, Wn = 50 μm, Wp = 20 μm, L = 10 μm, kn′ = 136 μA/V2, kp′ = 100 μA/V2, Vtn = +600 mV, Vtp = −600 mV, λn = 0.02 V−1, and λp = 0.03 V−1. In addition, assume that W1 = Wn, W2 = 3 Wp, and W3 = 2 Wp. (a) Calculate a value for VOV3 and ID3. (50 pts) (b) Calculate a value for VOV2 and ID2⋅(50 pts) (c) Calculate a value for VOV1 and VI such that ID1 = ID2. (25 pts) (d) Calculate a value for VO⋅(25 pts) (e) Calculate a value for vO(min) and vO(max). You may neglect the effect that RL may have on the values. (100 pts) (f) The low-frequency small-signal voltage gain is given by Av(LF) = -39.2185 V/V. (0 pts) (g) Calculate a value for Vpi(max) and Vpo(max)⋅(50 pts)
11.17 The initial parameters of an n-channel MOSFET are kn′ = 0.15 mA/V2, L = 1.2 μm, W = 6.0 μm, and VT = 0.45 V. The device operates over a voltage range of 0 to 3 V. Assume a constant-field scaling factor of k = 0.65, but assume the threshold voltage is constant. (a) Determine the maximum drain current in the (i) original device and (ii) scaled device. (b) Determine the maximum power dissipation in the (i) original device and (ii) scaled device.
Consider the CMOS circuit to the right. Vtn = |Vtp| = 0.5 V μnCox = 4μpCox = 400 μA/V2 Wn = 270 nm Ln = 180 nm (Reminder that kn = WLμnCox) a. You have a goal of making the current through both transistors equal to 20 μA. If successful, what value of VO will occur? b. Find the W/L ratio for the PMOS that would result in 20 μA of current to pass through both transistors.
The MOS differential amplifier shown in the figure utilizes matched NMOS transistors having Vt = 0.4 V and kn = 16 mA/V2. The channel-length modulation effect can be neglected. a) For VG1 = VG2 = 0 V, find ID1, ID2, VD1, VD2, and VOV for each of Q1 and Q2, and VS. b) For VG1 = VG2 = VCM, what is the highest value of VCM for which Q1 and Q2 remain in saturation? Hints: Both Q1 and Q2 are in the saturation region. With λ assumed to be 0, ID1 = ID2 = 12 knVOV1,22 Also, VGS1 = VGS2 = Vt + VOV
Analyze the circuit shown in the figure below and: Calculate the ID( sat ) and VDS(off). Calculate the operating point, the theoretical voltage gain, input impedance, and output impedance for all conditions listed in the table below. Measure DS voltage, and make sure that the transistor is in the saturation region. If the transistor is in the triode region, then reduce RD to have VDS between 3 to 4 volts DC. VD = 12 V, RD = 2.6 KΩ, RS = 1 KΩ, RG1 = RG2 = 100 KΩ, RL = 27 KΩ, CC2 = 10 μF, CC1 = 10 μF, CS = 33 μF Figure 6. CS Amplifier with coupling capacitors
Question 3 (25 marks) Figure 4 shows an amplifier with current mirror as active load. The MOSFETs have the following parameters: Vtn = −Vtp = 0.6 V, Kn′ = 200 μA/V2, Kp′ = 65 μA/V2, VA(NMOS) = 20 V, VA(PMOS) = −10 V, L = 0.4 μm and W = 10 μm. The supply voltage, VDD = 3 V and the reference current, IREF is 0.02 mA. Assume all the transistors are biased in the saturation region. Figure 4 (a) Identify the transistors forming the current mirror. [3 marks] (b) Calculate the output resistances of transistors Q1 and Q2. [6 marks] (c) Given that ID = k′(W/L)(VGS − Vt)2, calculate the gate to source voltage of Q1. [7 marks] (d) Calculate the small-signal voltage gain, vout/Vin. [9 marks]