Question

Notify Me Bookmark

10.17 The power MOSFET circuit of Figure P10.17 is configured as a voltagecontrolled current source (VCCS). Let K = 1.5 A/V2 and Vt = 3 V. a. If VG = 5 V, find the range of R for which the VCCS will operate. b. If R = 1 Ω, determine the range of VG for which the VCCS will operate. Figure P10.17

10.17 The power MOSFET circuit of Figure P10.17 is configured as a voltagecontrolled current source (VCCS). Let K = 1.5 A/V2 and Vt = 3 V. a. If VG = 5 V, find the range of R for which the VCCS will operate. b. If R = 1 Ω, determine the range of VG for which the VCCS will operate. Figure P10.17

Image text
10.17 The power MOSFET circuit of Figure P10.17 is configured as a voltagecontrolled current source (VCCS). Let K = 1.5 A / V 2 and V t = 3 V . a. If V G = 5 V , find the range of R for which the VCCS will operate. b. If R = 1 Ω , determine the range of V G for which the VCCS will operate. Figure P10.17

Detailed Answer

0 0

Please enter your email here. You will get email when this question is answered by our tutor.

Doubtrix Logo

Problem is not yet solved!

Click on Notify me to get email when question is answered.

Join Doubtrix with 7-days free trial

  • Icon Correct & Verified Answers
  • Icon No AI-Generated Answers
  • Icon Video Solution for Difficult Questions
  • Icon Work With Experts to Reach at Correct Answers
Notify me Login Sign Up

Similar/Related Questions

For the amplifier below, following design information is provided: VDD = 3.3 V, R = 2.4 kΩ, ISS = 1.8 mA, k1 = k2 = 5 mA/V2, VTH,1 = VTH,2 = 0.5 V, λ = 0.1 V−1, γ = 0, ki′ = μ0Cox, ki = μ0 Cox(W L)i. Assume that both transistors are identical and in the saturation region. Finally, NMOS and PMOS bulk terminals are connected to the ground and VDD, respectively. a) What is the DC bias voltage for M1 and M2 given that the voltage drop across ISS is 0.4 V ? You can neglect the channel length modulation, here. Check that the transistors are in the correct operation-mode. b) The resistors will be realized using identical PMOS transistors M3 and M4. If the transistors to be used will have k3 = k4 = 1.5 mA/V2, what will be their overdrive voltages? Check that the transistors are in the correct operation-mode. c) What is the differential voltage gain AV,diff = Vout/Vid in dB ? d) ISS will be realized as a cascode current source. Assume that the voltage drop of 0.4 V is equally shared by the two transistors, M5 and M6 having k5′ = k6′ = 0.5 mA/V2 and VTH, 5 = VTH, 6 = 0.5 V. Assuming the gate voltages of both transistors are 1 V, find the W/L ratios of each device. Once again, you can neglect the channel length modulation here. e) Considering (d), how would the W/L ratios qualitatively change (increase/decrease/stays the same), if γ > 0 ? Explain your reasoning analytically, i. e. , using appropriate equations. f) Using the cascode current source, calculate the common-mode gain of the circuit AV, CM = Vout /Vin in dB, where Vin . s applied to the gates of both M1 and M2. Assume λ = 0.1 V−1 for M5 and M6. g) Calculate the CMRR of the circuit in dB.
Solution
0 0

Q5. An amplifier is to be constructed using a n-channel enhancement type MOSFET which has a conduction parameter of k = 50 mA/V2 and a threshold voltage VTH = 1.8 V. Given that RD = 420 Ω, determine the answers for the following questions (20 marks) Figure Q5 a) Design the values of the resistors, R1, R2 and RS, required to bias the MOSFET amplifier at VG = 5 V and drain current at ID = 16 mA. (6 marks) b) Compute the values of VGS and VDS. (6 marks) c) Sketch the transfer curve and DC load line of the circuit and define the Q-point, VTH, VGSO, ID(max) and IDQ points on the graph. (8 marks)
Solution
0 0

The nMOS transistor in the circuit shown below has a kn = 2 mA/V2 and Vtn = 1 V. a. What is the maximum and minimum VG (gate voltage) for which the transistor operates in the saturation region? b. What is the V0 range for operation in saturation? c. Calculate the drain current ID for VG = 3 V. Hint: Part a. will help you decide the region of operation.
Solution
0 0