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13.20. The circuit of Fig. 13.63 samples the input on C1 when CK is high and connects C1 and C2 when CK is low. Assume that (W/L)1 = (W/L)2 and C1 = C2. 13.21. If the initial voltages across C1 and C2 are zero and Vin = 2 V, plot Vout versus time for many clock cycles. Neglect charge injection and clock feedthrough. 13.22. What is the maximum error in Vout due to charge injection and clock feedthrough of M1 and M2? Assume that the channel charge of M2 splits equally between C1 and C2. 13.23. Determine the sampled kT/C noise at the output after M2 turns off.

13.20. The circuit of Fig. 13.63 samples the input on C1 when CK is high and connects C1 and C2 when CK is low. Assume that (W/L)1 = (W/L)2 and C1 = C2. 13.21. If the initial voltages across C1 and C2 are zero and Vin = 2 V, plot Vout versus time for many clock cycles. Neglect charge injection and clock feedthrough. 13.22. What is the maximum error in Vout due to charge injection and clock feedthrough of M1 and M2? Assume that the channel charge of M2 splits equally between C1 and C2. 13.23. Determine the sampled kT/C noise at the output after M2 turns off.

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13.20. The circuit of Fig. 13.63 samples the input on C1 when CK is high and connects C1 and C2 when CK is low. Assume that (W/L)1 = (W/L)2 and C1 = C2. 13.21. If the initial voltages across C1 and C2 are zero and Vin = 2 V, plot Vout versus time for many clock cycles. Neglect charge injection and clock feedthrough. 13.22. What is the maximum error in Vout due to charge injection and clock feedthrough of M1 and M2? Assume that the channel charge of M2 splits equally between C1 and C2. 13.23. Determine the sampled kT/C noise at the output after M2 turns off.

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