(2pts) Using the constant voltage drop (CVD) diode model, what is the value of Vo for the circuit shown in Figure 2? Assume standard silicon diodes with VD = 0.7 V. Figure 2 Vdd = 3.3 V R = 10 kΩ V1 = 1 V V2 = 2 V Vo = 2.7 V Vo = 1 V Vo = 2 V Vo = 1.7 V
![b. Design the NMOS saturated inverter shown in Figure 3 for VDD = 3.3 V and P = 0.1 mW with Vo = 0.2 V and IDD = 33 μA. Assume Kn′ = 25 μA/V2 and VTN = 1 V. Explain the functionality of the inverter. [5 marks] ii. Design the inverter with the data given above. Ignore the body effect [10 marks] Figure 3](https://www.doubtrix.com/uploads/editor/1774621224JkZBZuRKAk.png)
![(a) Assume that the MOSFET in Figure 3.1 is operating in saturation and is characterised by a threshold voltage, VT = 1 V. Assume that the parameter, K = 1 mA/V2 where the drain-source current in the MOSFET in saturation is given by the usual expression: iDS = K2(vGS−VT)2 Calculate the output voltage, vo, for the circuit shown in Figure 3.1 when vIN = 2.5 V, Vs = 10 V, and R = 1 kΩ. The correct solution should satisfy both conditions necessary for the device to operate in saturation. Figure 2.1 [10 marks] (b) For the circuit in Figure 2.1, calculate the small signal voltage gain of the circuit, Av, at the operating point defined by the numerical values of part (a). Assume the input and output voltages include small signal components, vin and vout respectively. VIN and Vout correspond to the constant DC components of the input and output voltage from part (a). vIN = VIN +vin vOUT = VOUT +vout Av = vout vin [10 marks] (c) Determine the small signal output impedance at the terminals labelled a and b for the circuit shown in Figure 3.1 and at the operating point defined by the numerical values of part (a). [10 marks]](https://www.doubtrix.com/uploads/editor/3475428305cJOidAHSIp.jpg)
