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a) Assuming we can control the VIN between 0.5 V and 2.5 V, find the maximum value for resistor R as a function of VIN for the NMOS to stay in saturation. Note: The pullup resistor R is preferred to be large, a bit too large, and we go into the linear region of operation. b) Assume we want to keep the VOUT at 1.5 V, and ID at 200 uA. What should be the values for bias voltage VIN and resistor R? c) Based on part (b) values, find the maximum and minimum values for VOUT and VIN so that the NMOS stays in saturation. d) Based on part (b) values, find open circuit small signal gain, AV. Hint: Need to find values for gm and g0 first. For the following NMOS amplifier (driving load RL ) with the following parameters: Vdd = 2.5v Vbs = 0 RL = 10 k Vt0 = 0.5v lambda = 0.11v-1 W/L = 10 unCox = 200.0 uA/V2 Suppose the load resistor, RL, is not connected (open circuit):

a) Assuming we can control the VIN between 0.5 V and 2.5 V, find the maximum value for resistor R as a function of VIN for the NMOS to stay in saturation. Note: The pullup resistor R is preferred to be large, a bit too large, and we go into the linear region of operation. b) Assume we want to keep the VOUT at 1.5 V, and ID at 200 uA. What should be the values for bias voltage VIN and resistor R? c) Based on part (b) values, find the maximum and minimum values for VOUT and VIN so that the NMOS stays in saturation. d) Based on part (b) values, find open circuit small signal gain, AV. Hint: Need to find values for gm and g0 first. For the following NMOS amplifier (driving load RL ) with the following parameters: Vdd = 2.5v Vbs = 0 RL = 10 k Vt0 = 0.5v lambda = 0.11v-1 W/L = 10 unCox = 200.0 uA/V2 Suppose the load resistor, RL, is not connected (open circuit):

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a) Assuming we can control the VIN between 0.5 V and 2.5 V, find the maximum value for resistor R as a function of VIN for the NMOS to stay in saturation. Note: The pullup resistor R is preferred to be large, a bit too large, and we go into the linear region of operation. b) Assume we want to keep the VOUT at 1.5 V, and ID at 200 uA. What should be the values for bias voltage VIN and resistor R? c) Based on part (b) values, find the maximum and minimum values for VOUT and VIN so that the NMOS stays in saturation. d) Based on part (b) values, find open circuit small signal gain, AV. Hint: Need to find values for gm and g0 first. For the following NMOS amplifier (driving load RL ) with the following parameters: Vdd = 2.5v Vbs = 0 RL = 10 k Vt0 = 0.5v lambda = 0.11v-1 W/L = 10 unCox = 200.0 uA/V2 Suppose the load resistor, RL, is not connected (open circuit):

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For the following NMOS amplifier (with another NMOS used as a pull-up). The following parameters are for both M1 and M2 transistors: Vdd = 2.5v Vbs = 0 Vt0 = 0.5v lambda = 0.11v-1 W/L = 10 unCox = 200.0 uA/V2 a) For VIN equal to 1.25 V, what region is transistor M1 operating in? Find VOUT . b) For VIN equal to 2.0 V, what region is transistor M1 operating in? Find VOUT. c) Create a small signal model for this circuit. Find open circuit gain AV. d) For VIN equal to 1.25 V, Find the value for open circuit voltage gain, AV. Hint: Need values for gM1, gM2, rOM1, rOM2; combine two small signal models, one for each transistor, to find the final small signal model.
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For the shown PMOS amplifier driving load RL with the following parameters: Vdd = 2.5v RL = 10 kohm Vt = -0.5v lambda = 0.67 v-1 W/L = 10 upCox = 50.0 uA/v2 IBias = 100 uA a) Find the value of VIN for VOUT equal to zero. Hint: Current through the load resistor, RL, is zero b) Write a small signal model for this amplifier in SPICE. Hint: Don't need Vin , and know VIN when VOUT = 0 (part a) which helps calculate gm and g0 (r0 = 1/g0) c) Simulate your model and study the results, can you measure the gain for th given load (RL) ? d) Find its small signal gain Av = VOUT/VIN. Hint: Easy to find as you already have g0, gm, and RL e) Find the range for VOUT that the PMOS stays in the saturation region. f) Find the range for VIN that the PMOS stays in the saturation region. Hint for d and e: VOUT = (-ID-IBias)?RL

For the shown PMOS amplifier driving load RL with the following parameters: Vdd = 2.5v RL = 10 kohm Vt = -0.5v lambda = 0.67 v-1 W/L = 10 upCox = 50.0 uA/v2 IBias = 100 uA a) Find the value of VIN for VOUT equal to zero. Hint: Current through the load resistor, RL, is zero b) Write a small signal model for this amplifier in SPICE. Hint: Don't need Vin , and know VIN when VOUT = 0 (part a) which helps calculate gm and g0 (r0 = 1/g0) c) Simulate your model and study the results, can you measure the gain for th given load (RL) ? d) Find its small signal gain Av = VOUT/VIN. Hint: Easy to find as you already have g0, gm, and RL e) Find the range for VOUT that the PMOS stays in the saturation region. f) Find the range for VIN that the PMOS stays in the saturation region. Hint for d and e: VOUT = (-ID-IBias)?RL

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For the circuit shown in Figure 2, VDD = 5 V, and transistors M1 and M2 have properties µnCox = 200µA/V2, (W/L) = 10, Vt0 = 0.7 V, and λ = 0. You may neglect the body effect below, unless you are specifically asked to consider it. Figure 2. Circuit for Problem 2. a) Draw the circuit above, and label the drain, gate, source, and bulk nodes for both transistors, using labels VD1, VG1, VS1, and VB1 for the drain, gate, source, and bulk nodes of device M1, respectively, and similarly for M2. In total, there should be 8 labels in your schematic. For this part, assume the transistors are in saturation. b) Determine the valid input range for the circuit under consideration; that is, determine the range on the input voltage Vin such that transistors M1 and M2 are operating in the saturation region. Note that, in your analysis, you are not constrained to Vin values between 0 V and VDD, inclusive; e.g., if Vin = 100 V keeps both of the transistors in saturation, then Vin = 100 V should be included in your range of valid input voltages. Your answer to this part should take the form Vin,low ≤ Vin ≤ Vin,high ; hopefully, it is obvious that you are being asked to provide numerical answers for the lower- and upper-bounds Vin,low and Vin,high , respectively. c) For the valid input range that you determined in part (b), determine the corresponding output voltage range; that is, determine Vout,low ≤ Vout ≤ Vout,high when the input is constrained to Vin,low ≤ Vin ≤ Vin,high. . As before, you should report numerical values for the lower- and upper-bounds Vout,low and Vout,high, , respectively. d) Determine the "on voltage" VON2 (or, as in the Sedra/Smith textbook, the "overdrive voltage") and drain current ID2 of transistor M2 over the range of valid input voltages. Also, determine the drain current ID1 of M1 over the valid input range. e) If you were to consider it, would any of the transistors in the circuit above be affected by the body effect? If "yes," then list the device (or, devices, as the case may be). Qualitatively speaking, how would your answers to parts (b) and (c) change if you were to take the body effect into account? Explain your reasoning.
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