A DRAM cell uses a storage capacitor of 20 fF, VDD = 3.0 V and VT = 0.

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A DRAM cell uses a storage capacitor of 20 fF, VDD = 3.0 V and VT = 0.5 V for the NMOS access FET. If the bit line capacitance is 273 fF, the leakage current is 3 nA, and the memory is refreshed every 3 μsec, then what is the minimum voltage in millivolts that the sense amp must be able to detect as a valid one? Answer: The correct answer is: 139.9

A DRAM cell uses a storage capacitor of 20 fF, VDD = 3.0 V and VT = 0.5 V for the NMOS access FET. If the bit line capacitance is 273 fF, the leakage current is 3 nA, and the memory is refreshed every 3 μsec, then what is the minimum voltage in millivolts that the sense amp must be able to detect as a valid one? Answer: The correct answer is: 139.9

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A DRAM cell uses a storage capacitor of

20 f F, V D D = 3.0 V

and

V T = 0.5 V

for the NMOS access

F E T

. If the bit line capacitance is

273 f F

, the leakage current is

3 n A

, and the memory is refreshed every

3 μ s e c

, then what is the minimum voltage in millivolts that the sense amp must be able to detect as a valid one?

Answer:

◻

The correct answer is: 139.9

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