Question

Notify Me Bookmark

A) The measured ID versus VDS characteristic of the two MOSFETs are shown in Figure 1. a. On Figure 1 A, clearly label the Triode and Saturation Region of operation? (4 points) Figure 1 A Figure 1 B b. What are the output resistances of M1 and M2 in saturation? c. What are the Ron of M1 and M2 in the triode region?

A) The measured ID versus VDS characteristic of the two MOSFETs are shown in Figure 1. a. On Figure 1 A, clearly label the Triode and Saturation Region of operation? (4 points) Figure 1 A Figure 1 B b. What are the output resistances of M1 and M2 in saturation? c. What are the Ron of M1 and M2 in the triode region?

Image text
A) The measured ID versus VDS characteristic of the two MOSFETs are shown in Figure 1. a. On Figure 1A, clearly label the Triode and Saturation Region of operation? (4 points) Figure 1A Figure 1B b. What are the output resistances of M1 and M2 in saturation? c. What are the Ron of M1 and M2 in the triode region?

Detailed Answer

0 0

Please enter your email here. You will get email when this question is answered by our tutor.

Doubtrix Logo

Problem is not yet solved!

Click on Notify me to get email when question is answered.

Join Doubtrix with 7-days free trial

  • Icon Correct & Verified Answers
  • Icon No AI-Generated Answers
  • Icon Video Solution for Difficult Questions
  • Icon Work With Experts to Reach at Correct Answers
Notify me Login Sign Up

Similar/Related Questions

In this question, we will study the source follower cascaded by a CS stage. Neglect body effect and channel length modulation. (a) First we carry out a dc analysis on the CS stage. In the CS stage circuit shown in Figure 1, assume μnCox(W/L)1 = μpCox(W/L)2 = 1mA/V2, VTN = 0.7V, VTP = −1V, VDD = 2.5V. Calculate I1 and VOUT such that M1 operates in saturation with VGS1 = 0.8 V. What is VIN if M1 is at the edge of saturation? (b) Then we do small signal analysis on the CS stage. In the circuit shown in Figure 1, derive the small signal voltage gain Av = vout/vin. What is the maximum dc level of Vin for which M1 remains saturated? Express VIN by VDD, gate-source voltages and threshold voltages of M1 and M2. (c) To accommodate an input de level close to VDD, we further cascade it with a source follower as shown in Figure 2. Derive the small signal gain vout/vin. If VIN = VDD, what relationship between the gate-source voltages of M2 and M3 guarantees that M1 is saturated?
Solution
1 0

Given the following circuit, assuming that all inputs of the circuit shown in Figure 1 below are initially 0 during the precharge phase and that all internal nodes are at 0V: a. Calculate the voltage drop on V0, if A changes to 1 (VDD = 2.5 V) during the evaluate phase. It is given that Vtn = 0.5 V, 2φF = 0.6 V and γ = 0.4 V0.5 . Hint: Don’t forget the body effect. b. Now calculate the voltage drop on Vo if both A and B change to 1 (under the above conditions). c. What is the maximum number of transistors that can be connected in series to M1 and M2 (including M1 and M2, excluding M0 ) if the output should not fall below 0.9 V during the evaluate phase? Assume that each one of the new transistors has the same intrinsic capacitance (to ground) as M1 and M2 (C=10fF).
Solution
1 0

In the circuit of Fig. 1, VDD = 3 V and IREF = 100 μA. The input CM level applied to the gates of M1 and M2 is equal to 1.3 V. The device parameters are shown in table 2. You need to take source/ drain side diffusion into consideration and assume λ = γ = 0. All transistors are operated at saturation region. (40 pts) (a) Determine Vp. (b) Determine drain voltage of M3. (c) Determine IDS,M10 and ISD,M5. Figure 1 Table 2 Cox = 3.837×10-3 F/m2 For Nmos: Vth = 0.7 V2 ΦF = 0.9 V λ = 0.1 V-1 γ = 0.45 V1/2 For Pmos: Vth = -0.8 V 2ΦF = 0.8 V λ = 0.2 V-1 γ = 0.4 V1/2

In the circuit of Fig. 1, VDD = 3 V and IREF = 100 μA. The input CM level applied to the gates of M1 and M2 is equal to 1.3 V. The device parameters are shown in table 2. You need to take source/ drain side diffusion into consideration and assume λ = γ = 0. All transistors are operated at saturation region. (40 pts) (a) Determine Vp. (b) Determine drain voltage of M3. (c) Determine IDS,M10 and ISD,M5. Figure 1 Table 2 Cox = 3.837×10-3 F/m2 For Nmos: Vth = 0.7 V2 ΦF = 0.9 V λ = 0.1 V-1 γ = 0.45 V1/2 For Pmos: Vth = -0.8 V 2ΦF = 0.8 V λ = 0.2 V-1 γ = 0.4 V1/2
Solution
0 0