An 8 transistor SRAM cell design is shown below. With this design, the

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An 8 transistor SRAM cell design is shown below. With this design, there is a Write Word Line that is used to write the values of WBL and WBL_bar into the cell, and a separate Read Word Line that is used to read the content of the cell on the Read Bit Line (RBL). Explain the operation of this cell, and why/how it is useful. Which transistors are involved in a Write operation? Comment about their sizing limitations. Which transistors are involved in a Read operation? Comment about their sizing limitations.

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An 8 transistor SRAM cell design is shown below. With this design, there is a Write Word Line that is used to write the values of WBL and WBL bar into the cell, and a separate Read Word Line that is used to read the content of the cell on the Read Bit Line (RBL). Explain the operation of this cell, and why/how it is useful.

Which transistors are involved in a Write operation? Comment about their sizing limitations. Which transistors are involved in a Read operation? Comment about their sizing limitations.