An NMOS transistor fabricated in a process for which the process transconductance parameter is 400 uA/V^2 has its gate and drain connected together. The resulting two-terminal device is fed with a current source I as shown in Fig. 1. With I = 40 uA, the voltage across the device is measured to be 0.6 V. When I is increased to 90 uA, the voltage increases to 0.7 V. Find Vt and (W/L) of the transistor. Ignore channel-length modulation.

An NMOS transistor fabricated in a process for which the process transconductance parameter is 400 uA/V^2 has its gate and drain connected together. The resulting two-terminal device is fed with a current source I as shown in Fig. 1. With I = 40 uA, the voltage across the device is measured to be 0.6 V. When I is increased to 90 uA, the voltage increases to 0.7 V. Find Vt and (W/L) of the transistor. Ignore channel-length modulation.

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An NMOS transistor fabricated in a process for which the process transconductance parameter is 400 uA/V^2 has its gate and drain connected together. The resulting two-terminal device is fed with a current source I as shown in Fig. 1. With I = 40 uA, the voltage across the device is measured to be 0.6 V. When I is increased to 90 uA, the voltage increases to 0.7 V. Find Vt and (W/L) of the transistor. Ignore channel-length modulation.

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