Question

Notify Me Bookmark

Assume all transistors are operating in saturation and λ = 0. (a) Sketch, in the same graph, ID1 and ID2 versus Vin1 − Vin 2 (b) For what value of Vin1 − Vin 2 are ID1 and ID2 equal? Show the point in the graph of part (a).

Assume all transistors are operating in saturation and λ = 0. (a) Sketch, in the same graph, ID1 and ID2 versus Vin1 − Vin 2 (b) For what value of Vin1 − Vin 2 are ID1 and ID2 equal? Show the point in the graph of part (a).

Image text
Assume all transistors are operating in saturation and λ = 0 . (a) Sketch, in the same graph, I D 1 and I D 2 versus V in 1 − V in 2 (b) For what value of V in 1 − V in 2 are I D 1 and I D 2 equal? Show the point in the graph of part (a).

Detailed Answer

0 0

Please enter your email here. You will get email when this question is answered by our tutor.

Doubtrix Logo

Problem is not yet solved!

Click on Notify me to get email when question is answered.

Join Doubtrix with 7-days free trial

  • Icon Correct & Verified Answers
  • Icon No AI-Generated Answers
  • Icon Video Solution for Difficult Questions
  • Icon Work With Experts to Reach at Correct Answers
Notify me Login Sign Up

Similar/Related Questions

Assume all transistors are operating in saturation and λ = 0. (a) Sketch, in the same graph, ID1 and ID2 versus Vin1 − Vin2 (b) For what value of Vin1 − Vin2 are ID1 and ID2 equal? Show the point in the graph of part (a).

Solution
0 0

For the circuit shown in Figure 2, VDD = 5 V, and transistors M1 and M2 have properties µnCox = 200µA/V2, (W/L) = 10, Vt0 = 0.7 V, and λ = 0. You may neglect the body effect below, unless you are specifically asked to consider it. Figure 2. Circuit for Problem 2. a) Draw the circuit above, and label the drain, gate, source, and bulk nodes for both transistors, using labels VD1, VG1, VS1, and VB1 for the drain, gate, source, and bulk nodes of device M1, respectively, and similarly for M2. In total, there should be 8 labels in your schematic. For this part, assume the transistors are in saturation. b) Determine the valid input range for the circuit under consideration; that is, determine the range on the input voltage Vin such that transistors M1 and M2 are operating in the saturation region. Note that, in your analysis, you are not constrained to Vin values between 0 V and VDD, inclusive; e.g., if Vin = 100 V keeps both of the transistors in saturation, then Vin = 100 V should be included in your range of valid input voltages. Your answer to this part should take the form Vin,low ≤ Vin ≤ Vin,high ; hopefully, it is obvious that you are being asked to provide numerical answers for the lower- and upper-bounds Vin,low and Vin,high , respectively. c) For the valid input range that you determined in part (b), determine the corresponding output voltage range; that is, determine Vout,low ≤ Vout ≤ Vout,high when the input is constrained to Vin,low ≤ Vin ≤ Vin,high. . As before, you should report numerical values for the lower- and upper-bounds Vout,low and Vout,high, , respectively. d) Determine the "on voltage" VON2 (or, as in the Sedra/Smith textbook, the "overdrive voltage") and drain current ID2 of transistor M2 over the range of valid input voltages. Also, determine the drain current ID1 of M1 over the valid input range. e) If you were to consider it, would any of the transistors in the circuit above be affected by the body effect? If "yes," then list the device (or, devices, as the case may be). Qualitatively speaking, how would your answers to parts (b) and (c) change if you were to take the body effect into account? Explain your reasoning.
Solution
0 0

Consider the current mirror circuit shown in Figure 4 on page 6 where an additional resistor R is connected between the gates of the MOSFETS and ground. Assume all transistors are in saturation and you can ignore Early effect. (a) Given that IREF = 250 µA, Kn’ for the MOSFET is 10 µA/V2, VTN = 1 V, (W/L)1 = 5, (W/L)2 = 10 and R = 20 kΩ, find the values of the DC voltage VGS1 and DC currents ID1 and ID2. (10 Marks) (b) Perform an AC small-signal analysis to find an algebraic expression of the input resistance Rin in terms of the transconductance gm of the MOSFETS and the resistor R. Indicate clearly the gm of the i-th transistor as gmi. For example, the gm of transistor M1 should be written as gm1. (5 Marks) (c) Using the transistor parameters and resistor values given in part (a), find out the magnitude of the input resistance Rin found in part (b). (5 Marks)

Consider the current mirror circuit shown in Figure 4 on page 6 where an additional resistor R is connected between the gates of the MOSFETS and ground. Assume all transistors are in saturation and you can ignore Early effect. (a) Given that IREF = 250 µA, Kn’ for the MOSFET is 10 µA/V2, VTN = 1 V, (W/L)1 = 5, (W/L)2 = 10 and R = 20 kΩ, find the values of the DC voltage VGS1 and DC currents ID1 and ID2. (10 Marks) (b) Perform an AC small-signal analysis to find an algebraic expression of the input resistance Rin in terms of the transconductance gm of the MOSFETS and the resistor R. Indicate clearly the gm of the i-th transistor as gmi. For example, the gm of transistor M1 should be written as gm1. (5 Marks) (c) Using the transistor parameters and resistor values given in part (a), find out the magnitude of the input resistance Rin found in part (b). (5 Marks)
Solution
0 0