Assume M1, M2 are ideal (λ = 0) and M3, M4 are not ideal (λ > 0) in the following circuit. All the transistors are operating in saturation region. What is the voltage gain ACM-DM, ADM and the CMRR? Assume ΔRD ≈ 0 for ADM. Make reasonable assumptions when necessary.
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Assume M1, M2 are ideal (λ = 0) and M3, M4 are not ideal (λ > 0) in the following circuit. All the transistors are operating in saturation region. What is the voltage gain ACM-DM, ADM and the CMRR? Assume ΔRD ≈ 0 for ADM. Make reasonable assumptions when necessary.
![b) By investigating the circuit shown in Figure Q1a, find the relationship among the gate-source voltages of transistors M1 - M3 that guarantees M1 is in saturation. Assume that the input voltage, Vin is equal to the power supply voltage, VDD. [4 Marks] c) Figure Q1b shows a combination of NMOS and PMOS current mirror circuits. Assume all the transistors are ideal and operating in saturation mode. Develop equations that show the relationships of the drain currents for transistors M1, M2, M3, and M4. [5 Marks] d) By analysing the current mirror circuit shown in Figure Q1c, plot and explain all the necessary conditions for VX and VY as a function of VDD. Assume that the transistors M1 and M2 are identical. [6 Marks] a) With aid of diagram, develop an equation for drain current, ID, based on a NMOS transistor in saturation region. [10 Marks]](https://www.doubtrix.com/js/ckeditor/filemanager/connectors/php/editor/1699463240-Bdfhy43hhgr.png)