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CMOS circuit: If there is a leakage with the PMOS transistor, the leakage can be modeled as a resistor R1 = 50 kΩ as shown in the figure below. tPHL will compared to R1 = ∞ (2 pt) (a) increase; (b) decrease; (c) Stay the same tPLH will compared to R1 = ∞ ( 2 pt) (a) increase; (b) decrease; (c) Stay the same

CMOS circuit: If there is a leakage with the PMOS transistor, the leakage can be modeled as a resistor R1 = 50 kΩ as shown in the figure below. tPHL will compared to R1 = ∞ (2 pt) (a) increase; (b) decrease; (c) Stay the same tPLH will compared to R1 = ∞ ( 2 pt) (a) increase; (b) decrease; (c) Stay the same

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CMOS circuit: If there is a leakage with the PMOS transistor, the leakage can be modeled as a resistor R 1 = 50 k Ω as shown in the figure below. t PHL will compared to R 1 = ∞ (2 pt) (a) increase; (b) decrease; (c) Stay the same tPLH will compared to R 1 = ∞ ( 2 p t ) (a) increase; (b) decrease; (c) Stay the same

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