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Consider DRAM based on 1-Transistor DRAM cell and operating at VDD = 2.5 V. Threshold voltage of NMOS is 0.5 V and precharge voltage of bitline is 1.25 V. Cell storage capacitance is 50 fF and the bit-line capacitance is 1 pF. How much voltage swing is created on the bitline when a cell storing ' 1 ' is accessed for the read operation? Select one: a. 59.5 mV b. 119 mV c. 35.7 mV d. 1.25 V e. 47.6 mV

Consider DRAM based on 1-Transistor DRAM cell and operating at VDD = 2.5 V. Threshold voltage of NMOS is 0.5 V and precharge voltage of bitline is 1.25 V. Cell storage capacitance is 50 fF and the bit-line capacitance is 1 pF. How much voltage swing is created on the bitline when a cell storing ' 1 ' is accessed for the read operation? Select one: a. 59.5 mV b. 119 mV c. 35.7 mV d. 1.25 V e. 47.6 mV

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Consider DRAM based on 1 -Transistor DRAM cell and operating at VDD = 2.5 V . Threshold voltage of NMOS is 0.5 V and precharge voltage of bitline is 1.25 V . Cell storage capacitance is 50 f F and the bit-line capacitance is 1 p F .
How much voltage swing is created on the bitline when a cell storing ' 1 ' is accessed for the read operation?
Select one: a. 59.5 m V b. 119 m V c. 35.7 m V d. 1.25 V e. 47.6 m V

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