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Consider the circuit shown in the figure. This is an amplifier in which the load resistor RD has been replaced with another NMOS transistor Q2 in the diode configuration. Note that the two transistors conduct equal drain currents. Assuming that Q1 is operated in saturation, find the small-signal voltage Av = vo/vi of the amplifier. The following parameters are given (W/L)1 = 24 μm/0.5 μm, (W/L)2 = 1.5 μm/0.5 μm. You can ignore the influence of λ in the analysis (i.e., assume λ = 0). Type in the value of the small-signal voltage gain, without the unit (V/V), paying attention to the polarity.

Consider the circuit shown in the figure. This is an amplifier in which the load resistor RD has been replaced with another NMOS transistor Q2 in the diode configuration. Note that the two transistors conduct equal drain currents. Assuming that Q1 is operated in saturation, find the small-signal voltage Av = vo/vi of the amplifier. The following parameters are given (W/L)1 = 24 μm/0.5 μm, (W/L)2 = 1.5 μm/0.5 μm. You can ignore the influence of λ in the analysis (i.e., assume λ = 0). Type in the value of the small-signal voltage gain, without the unit (V/V), paying attention to the polarity.

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Consider the circuit shown in the figure. This is an amplifier in which the load resistor R D has been replaced with another NMOS transistor Q2 in the diode configuration. Note that the two transistors conduct equal drain currents. Assuming that Q1 is operated in saturation, find the small-signal voltage A v = v o v i of the amplifier. The following parameters are given ( W L ) 1 = 24 μ m 0.5 μ m , ( W L ) 2 = 1.5 μ m 0.5 μ m . You can ignore the influence of λ in the analysis (i.e., assume λ = 0 ).
Type in the value of the small-signal voltage gain, without the unit ( V / V ) , paying attention to the polarity.

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*7.9 Figure P7.9 shows an amplifier in which the load resistor RD has been replaced with another NMOS transistor Q2 connected as a two-terminal device. Note that because vDG of Q2 is zero, it will be operating in saturation at all times, even when vI = 0 and iD2 = iD1 = 0. Note also that the two transistors conduct equal drain currents. Using iD1 = iD2, show that for the range of v1 over which Q1 is operating in saturation, that is, for Vt1 ≤ vI ≤ vO+Vt1 the output voltage will be given by vo = VDD − Vt + (W/L)1(W/L)2 Vt − (W/L)1(W/L)2 vt where we have assumed Vt1 = Vt2 = Vt. Thus the circuit functions as a linear amplifier, even for large input signals. For (W/L)1 = (50 μm/0.5 μm) and (W/L)2 = (5 μm/0.5 μm), find the voltage gain. Figure P7.9
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Current Mirrors (35 points) This problem introduces current mirrors, which will be covered in more details in future lectures. Consider the circuit shown below (Figure 2). (W/L)1 = 1, (W/L)2 = 5, Rref = 50 kΩ, ignore channel length modulation unless otherwise stated. Assume L1 = L2 = 1 μm. Figure 2 a) (5 points) Assume RL = 10 kΩ. Calculate IL, the current flowing through RL. What is the current mirroring ratio ( IL over Iref , where Iref is the current through Rref )? We want the current mirror to provide a load-independent current as much as possible, so check that M2 is in saturation. b) (5 points) Determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio you calculated in part a). Hint: for the current mirror to function as desired, transistor saturation should be maintained. c) (5 points) Channel length modulation introduces load-dependent errors in the mirroring ratio. Using λ = 0.1 V−1 for L = 1 μm, estimate the percentage error in the mirroring ratio. Here, set RL to its maximum value you got in part b ), and assume that we want the same IL as in parts a) and b). Hint: what should be the new VX and Iref ? d) (4 points) Compute the output resistance, Rout, , looking into the drain of M2. Use λ = 0.1 V−1 and assume the same IL as in parts a) through c). e) (5 points) Now consider redesigning the previous current mirror with source-degenerated transistors as shown in Figure 3. Ignore channel length modulation and body effect ( Assume bulk is tied to source). Transistor sizes remain the same, (WL)1 = 1 and (WL)2 = 5. This circuit has been designed to have the same Iref as in part a). What should the value of Rs2 be if we want the same current mirroring ratio as in a)? f) (5 points) Similarly to part b, determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio as in part e). g) (4 points) Now compute the output resistance, Rout , looking into the drain of M2 (using λ = 0.1 V−1 ). Assume IL as used in parts e) and f ). h) (2 points) Comparing the minimum output voltage and the output resistance of these two current mirrors, comment on the advantages and disadvantages of using source degeneration in a current mirror. Figure 3 Current Mirrors (35 points) This problem introduces current mirrors, which will be covered in more details in future lectures. Consider the circuit shown below (Figure 2). (W/L)1 = 1, (W/L)2 = 5, Rref = 50 kΩ, ignore channel length modulation unless otherwise stated. Assume L1 = L2 = 1 μm. Figure 2 a) (5 points) Assume RL = 10 kΩ. Calculate IL, the current flowing through RL. What is the current mirroring ratio ( IL over Iref , where Iref is the current through Rref )? We want the current mirror to provide a load-independent current as much as possible, so check that M2 is in saturation. b) (5 points) Determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio you calculated in part a). Hint: for the current mirror to function as desired, transistor saturation should be maintained. c) (5 points) Channel length modulation introduces load-dependent errors in the mirroring ratio. Using λ = 0.1 V−1 for L = 1 μm, estimate the percentage error in the mirroring ratio. Here, set RL to its maximum value you got in part b ), and assume that we want the same IL as in parts a) and b). Hint: what should be the new VX and Iref ? d) (4 points) Compute the output resistance, Rout, , looking into the drain of M2. Use λ = 0.1 V−1 and assume the same IL as in parts a) through c). e) (5 points) Now consider redesigning the previous current mirror with source-degenerated transistors as shown in Figure 3. Ignore channel length modulation and body effect ( Assume bulk is tied to source). Transistor sizes remain the same, (WL)1 = 1 and (WL)2 = 5. This circuit has been designed to have the same Iref as in part a). What should the value of Rs2 be if we want the same current mirroring ratio as in a)? f) (5 points) Similarly to part b, determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio as in part e). g) (4 points) Now compute the output resistance, Rout , looking into the drain of M2 (using λ = 0.1 V−1 ). Assume IL as used in parts e) and f ). h) (2 points) Comparing the minimum output voltage and the output resistance of these two current mirrors, comment on the advantages and disadvantages of using source degeneration in a current mirror. Figure 3

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