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Consider the design of a CMOS compound OR-AND-INVERT (OAI21) gate computing F = (A + B) ∙ C. a) sketch a transistor-level schematic b) sketch a stick diagram c) estimate the area from the stick diagram d) layout your gate with a CAD tool using unit-sized transistors e) compare the layout size to the estimated area

Consider the design of a CMOS compound OR-AND-INVERT (OAI21) gate computing F = (A + B) ∙ C. a) sketch a transistor-level schematic b) sketch a stick diagram c) estimate the area from the stick diagram d) layout your gate with a CAD tool using unit-sized transistors e) compare the layout size to the estimated area

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Consider the design of a CMOS compound OR-AND-INVERT (OAI21) gate computing F = (A + B) ∙ C. a) sketch a transistor-level schematic b) sketch a stick diagram c) estimate the area from the stick diagram d) layout your gate with a CAD tool using unit-sized transistors e) compare the layout size to the estimated area

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