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Consider the differential amplifier shown in Fig. 8. For both transistors, β = 100, VT = 26 mV and VA = 100 V. (a) Draw the differential mode half circuit and determine the differential gain (numerical answer needed). (b) Assume that, during manufacturing, a small mismatch appears where the collector resistance connected to Q2 has increased by 2%. Determine the common mode (to differential mode) gain (numerical answer needed). (c) Determine the CMRR (numerical answer needed). Propose two design strategies to improve the CMRR considering this resistor mismatch and circuit topology. Fig. 8.

Consider the differential amplifier shown in Fig. 8. For both transistors, β = 100, VT = 26 mV and VA = 100 V. (a) Draw the differential mode half circuit and determine the differential gain (numerical answer needed). (b) Assume that, during manufacturing, a small mismatch appears where the collector resistance connected to Q2 has increased by 2%. Determine the common mode (to differential mode) gain (numerical answer needed). (c) Determine the CMRR (numerical answer needed). Propose two design strategies to improve the CMRR considering this resistor mismatch and circuit topology. Fig. 8.

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Consider the differential amplifier shown in Fig. 8. For both transistors, β = 100 , V T = 26 m V and V A = 100 V . (a) Draw the differential mode half circuit and determine the differential gain (numerical answer needed). (b) Assume that, during manufacturing, a small mismatch appears where the collector resistance connected to Q 2 has increased by 2 % . Determine the common mode (to differential mode) gain (numerical answer needed). (c) Determine the CMRR (numerical answer needed). Propose two design strategies to improve the CMRR considering this resistor mismatch and circuit topology. Fig. 8.

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To improve the performance of the differential amplifier shown in Figure Q1, the biasing current source is replaced by a Widlar current source. The collector resistors are replaced by a current mirror formed by the matched bipolar transistors Qs and Q6, and the bipolar transistors Q1 and Q2 are replaced by the matched field-effect transistors M1 and M2. A single-sided output at the drain terminal of M2 is used. The transistor parameters for the bipolar transistors are: β = 100, VBE (on) = VEB(on) = 0.7 V, and VA = 100 V. The transistor parameters for M1 and M2 are: Kn = 0.15 mA/V2, VT N = 0.8 V, λ = 0.01 V-1 . The improved differential amplifier is shown in Figure Q2. (a) Determine the quiescent voltages and currents of M1 and M2 when v1 = v2 = 0. (4 marks) (b) Design the value of resistor RE such that IQ = 0.1 mA. (2 marks) (c) Determine the maximum and minimum common-mode voltages that can be applied to v1 and v2. (3 marks) (d) Determine the percentage change in IQ when the common-mode voltage applied to v1 and v2 changes from the maximum to the minimum value obtained in part (c). (5 marks) (c) Define vd = v1 - v2, determine the differential-mode voltage gain Ad of the improved differential amplifier.
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