Consider the differential pair with current mirror biasing and active loads given in figure below. Assume for both nMOS and pMOS devices; |Vth| = 1 V, |VA| = 20 V. kn(W/L) = 12.5 mA/V2 for Q1, Q2, Q3 and Q4 while kn(W/L) = kp(W/L) = 25 mA/V2 for Q5, Q6, Q7 and Q8. a. Find VGS voltages of each transistor. b. Calculate differential mode gain Adm. c. Calculate common mode gain Acm. d. Determine the input common mode range of the differential pair. ID = 1/2kn,p’W/L(|VGS|-|Vth|)2 gm = ∂ID/∂VGS.
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Consider the differential pair with current mirror biasing and active loads given in figure below. Assume for both nMOS and pMOS devices; |Vth| = 1 V, |VA| = 20 V. kn(W/L) = 12.5 mA/V2 for Q1, Q2, Q3 and Q4 while kn(W/L) = kp(W/L) = 25 mA/V2 for Q5, Q6, Q7 and Q8. a. Find VGS voltages of each transistor. b. Calculate differential mode gain Adm. c. Calculate common mode gain Acm. d. Determine the input common mode range of the differential pair. ID = 1/2kn,p’W/L(|VGS|-|Vth|)2 gm = ∂ID/∂VGS.