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Consider the following enhancement MOSFET circuit. The transistor is tested in the laboratory and following results are obtained: VGS(ON)=2V and ID(ON)=1 mA. The threshold voltage is also found to be VTH=1.5 Volts. Find ID, VGS and VDS.

Consider the following enhancement MOSFET circuit. The transistor is tested in the laboratory and following results are obtained: VGS(ON)=2V and ID(ON)=1 mA. The threshold voltage is also found to be VTH=1.5 Volts. Find ID, VGS and VDS.

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Consider the following enhancement MOSFET circuit. The transistor is tested in the laboratory and following results are obtained: VGS(ON)=2V and ID(ON)=1 mA. The threshold voltage is also found to be VTH=1.5 Volts. Find ID, VGS and VDS.

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Consider the following enhancement MOSFET circuit. The transistor is tested in the laboratory and following results are obtained: VGS(ON) = 2V and ID(ON) = 1 mA. The threshold voltage is also found to be VTH = 1.5 Volts. Find ID, VGS and VDS.
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Q5. An amplifier is to be constructed using a n-channel enhancement type MOSFET which has a conduction parameter of k = 50 mA/V2 and a threshold voltage VTH = 1.8 V. Given that RD = 420 Ω, determine the answers for the following questions (20 marks) Figure Q5 a) Design the values of the resistors, R1, R2 and RS, required to bias the MOSFET amplifier at VG = 5 V and drain current at ID = 16 mA. (6 marks) b) Compute the values of VGS and VDS. (6 marks) c) Sketch the transfer curve and DC load line of the circuit and define the Q-point, VTH, VGSO, ID(max) and IDQ points on the graph. (8 marks)
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Design Case: The I-V characteristics of a NMOS device is to be studied. Especially, the relationships between IDS, VGS, and VDS are to be found. Find the I-V characteristics of a NMOS with size W/L = 2u/0.4u by performing the following simulations: 1. Run a DC simulation and demonstrate IDS curve when VGS is swept from 0 V to 2 V. > Set VDS=1 V. > Plot the VGS VS. IDS curve. > Q1.1: What is the threshold voltage (VTH) of the given transistor? Q1.2: Explain how gm can be calculated from the VGS Vs. IDS curve. 2. Run a DC simulation and show IDS curve when VDS is swept from 0V to 2 V. > Set VGS = 700mV. > Plot VDS VS. IDS Curve. > Q2.1: At what VDS does the transistor transit from linear region to saturation region? > Q2.2: Does the given device suffer from channel length modulation effect? Q Q2.3: If it suffers from channel length modulation, how can it be fixed? Q2.4: Explain how ro can be calculated from the VDS vs. IDS curve. * For all design sessions, use nfet33 for NMOS and pfet33 for PMOS from "cmrf8sf" library.

Design Case: The I-V characteristics of a NMOS device is to be studied. Especially, the relationships between IDS, VGS, and VDS are to be found. Find the I-V characteristics of a NMOS with size W/L = 2u/0.4u by performing the following simulations: 1. Run a DC simulation and demonstrate IDS curve when VGS is swept from 0 V to 2 V. > Set VDS=1 V. > Plot the VGS VS. IDS curve. > Q1.1: What is the threshold voltage (VTH) of the given transistor? Q1.2: Explain how gm can be calculated from the VGS Vs. IDS curve. 2. Run a DC simulation and show IDS curve when VDS is swept from 0V to 2 V. > Set VGS = 700mV. > Plot VDS VS. IDS Curve. > Q2.1: At what VDS does the transistor transit from linear region to saturation region? > Q2.2: Does the given device suffer from channel length modulation effect? Q Q2.3: If it suffers from channel length modulation, how can it be fixed? Q2.4: Explain how ro can be calculated from the VDS vs. IDS curve. * For all design sessions, use nfet33 for NMOS and pfet33 for PMOS from "cmrf8sf" library.
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