Consider the following stick diagram of a CMOS design. A. Draw the equivalent transistor level schematic? Make sure to follow the right order of the transistors (closest to output, closest to ground...etc) B. Write the implemented logical expression for Y ? C. Size the transistors in your design with a Wp/Wn = 3/2 ratio? D. Estimate the area in terms of Lambda, if track length is 6-Lambda? E. If this was a 100 nm technology, what is the area of the circuit?
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Consider the following stick diagram of a CMOS design. A. Draw the equivalent transistor level schematic? Make sure to follow the right order of the transistors (closest to output, closest to ground...etc) B. Write the implemented logical expression for Y ? C. Size the transistors in your design with a Wp/Wn = 3/2 ratio? D. Estimate the area in terms of Lambda, if track length is 6-Lambda? E. If this was a 100 nm technology, what is the area of the circuit?