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Consider the inverter below, with pMOSFETs at ID = 1 mA for VOV = 1 V and Vth = 0.5 V. (a) We want to perform load line analysis. Plot ID vs. Vout for all elements for Vin = 1 V on the left plot and Vin = 4 V on the right plot. Label intercepts and intersections, For full credit, label all regions (b) What is the small signal gain for such an inverter? Hint: any answer that ignores the characteristics of the clamped MOSFET is probably insufficient.

Consider the inverter below, with pMOSFETs at ID = 1 mA for VOV = 1 V and Vth = 0.5 V. (a) We want to perform load line analysis. Plot ID vs. Vout for all elements for Vin = 1 V on the left plot and Vin = 4 V on the right plot. Label intercepts and intersections, For full credit, label all regions (b) What is the small signal gain for such an inverter? Hint: any answer that ignores the characteristics of the clamped MOSFET is probably insufficient.

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Consider the inverter below, with pMOSFETs at ID = 1 mA for VOV = 1 V and Vth = 0.5 V. (a) We want to perform load line analysis. Plot ID vs. Vout for all elements for Vin = 1 V on the left plot and Vin = 4 V on the right plot. Label intercepts and intersections, For full credit, label all regions (b) What is the small signal gain for such an inverter? Hint: any answer that ignores the characteristics of the clamped MOSFET is probably insufficient.

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Consider MOSFET-based current source circuits shown below. Assume that the n-type MOSFET transistors follow the long-channel model with μnCox = 100 μA/V2 and Vth,n = 0.5 V. All the transistors have a fixed channel length L = 0.25 μm. The bias voltage VB1 is at 0.8 V. Assume that all transistors have no back-bias effect. (1) (2) (a) For a basic current source in Fig. (1), size the NMOS transistor M1's width ( = W1) so that it conducts a current of 1 mA when it operates in saturation region. You may assume λn = 0. (b) What is the minimum value of Vout for this circuit that keeps M1 in saturation region? (c) For a cascode current source in Fig. (2), assume that the transistor M2 has the same width with M1 you determined from part (a). Determine the value of VB2 that yields the lowest minimum VOUT keeping both M1 and M2 in saturation regions. (d) Now, let's assume that the transistors M1 and M2 have a finite output resistance with λn = 0.1 V−1. Compute the value of the output resistance (Rout) of this cascode current source when M1 and M2 are in the saturation region. (Hint: Calculate the output impedance in a small signal equivalent circuit.)
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For all circuits, do not consider channel length modulation for calculating bias points. Unless otherwise specified, channel length modulation effect needs to be considered for small-signal analysis. All answers should be given to the second decimal place. Circuit and device parameters are: Vdd = 5 V;VTn = VTp = 1 V; μnCox = 50 μA/V2; μpCox = 25 μA/V2; λn = λp = 0.01 V−1; Lmin = 1 μm Figure 1 (for problems 1-3) Figure 2 (for problems 5-9) Figure 1: Transistor M1 has (W/L) = (160 μm/2 μm) and a bias current Iout = 2 mA. We desire M1 to be in saturation. You should assume λn = 0 for problems (1)-(3). Determine the ratio R1 /R2 required. 1 point Let VTn increase by 10% to 1.1 V. What is the new value of Iout in mA ? 1 point Let μnCox increase by 10% to 55 μA/V2. What is the new value of Iout in mA ? 1 point Figure 2: The circuit has Iref = 2 mA and Vp = 4 V. Transistors M1, M2 and M3 have (W/L) = (80 μm/1 μm). Determine the value of vx. (in volts) 1 point Determine the minimum allowable value of Vb (in volts) such that all devices are in saturation. 1 point Determine the maximum allowable value of Vb (in volts) such that all devices are in saturation. 1 point Determine Vb (in volts) such that vX = VY. 1 point determine the output resistance of this circuit ∂Vp/∂Iout in MΩ. 1 point Description for questions 9-10: An NMOS device with ID = 1 mA must operate in saturation with drain-source voltages as low as 0.5 V. The minimum required small-signal output impedance is 400 kQ. {Hint: You need to use the relations: rout = 1 /(λ⋅ID); λ⋅L = constant; and expression for VDS, sat = VGS−VT} Determine the length of the device in μm. 1 point Determine the width of the device in μm. 1 point

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For all circuits, do not consider channel length modulation for calculating bias points. Unless otherwise specified, channel length modulation effect needs to be considered for small-signal analysis. All answers should be given to the second decimal place. Circuit and device parameters are: Vdd = 5 V; VTnn = VTp = 1 V; μnCox = 50 μA/V2; μpCox = 25 μA/V2; λn = λp = 0.01 V−1; Lmin = 1 μm Figure 1 (for problems 1-3) Figure 2 (for problems 5-9) Figure 1: Transistor M1 has (W/L) = (160 μm/2 μm) and a bias current Iout = 2 mA. We desire M1 to be in saturation. You should assume λn = 0 for problems (1)-(3). Determine the ratio R1 /R2 required. 1 point Let VTn increase by 10% to 1.1 V. What is the new value of Iout in mA ? 1 point Let μnCox increase by 10% to 55 μA/V2. What is the new value of Iout in mA ? 1 point Figure 2: The circuit has Iref = 2 mA and VP = 4 V. Transistors M1, M2 and M3 have (W/L) = (80 μm/1 μm). Determine the value of vx. (in volts) 1 point Determine the minimum allowable value of Vb (in volts) such that all devices are in saturation. 1 point Determine the maximum allowable value of Vb (in volts) such that all devices are in saturation. 1 point Determine Vb (in volts) such that VX = VY. 1 point determine the output resistance of this circuit ∂Vp/Iout in MQ. 1 point Description for questions 9-10: An NMOS device with ID = 1 mA must operate in saturation with drain-source voltages as low as 0.5 V. The minimum required small-signal output impedance is 400 kΩ. {Hint: You need to use the relations: rout = 1 /(λ⋅ID); λ⋅L = constant; and expression for VDS, sat = VGS−VT }Determine the length of the device in μm. 1 point Determine the width of the device in μm. 1 point

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