Design a CMOS circuit to perform this function: Z = (AB+C)D+E VTO,n = 0.7 V μnC0x = 75 μA/V2 VT0,p = −0.7 VμpCox = 25 μA/V2 Cload = 100fF, VDD = 3.3 V, minimum W and minimum L = 0.3μm. All nMOS transistors are identical, kn,A = kn,B = … = kn and All pMOS transistors are identical, kp,A = kp,8 =… = kp a. Draw the circuit. b. Draw graphs of PUN and PDN. c. Size the transistors such that the inverter equivalent of the circuit is symmetrical. d. Size the transistors such that tpHL < 200ps and tpLH < 200p for all cases.
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Design a CMOS circuit to perform this function: Z = (AB+C)D+E VTO,n = 0.7 V μnC0x = 75 μA/V2 VT0,p = −0.7 VμpCox = 25 μA/V2 Cload = 100fF, VDD = 3.3 V, minimum W and minimum L = 0.3μm. All nMOS transistors are identical, kn,A = kn,B = … = kn and All pMOS transistors are identical, kp,A = kp,8 =… = kp a. Draw the circuit. b. Draw graphs of PUN and PDN. c. Size the transistors such that the inverter equivalent of the circuit is symmetrical. d. Size the transistors such that tpHL < 200ps and tpLH < 200p for all cases.
