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Design (find RD, RS, R1, R2) a generic bias circuit for the amplifier shown below to establish a drain current ID=4 mA operating in the saturation region. The transistor has a kn= 2 mA/V^2 and a threshold voltage Vt = 1 V. For the DC design you may assume the channel length modulation is negligible).

Design (find RD, RS, R1, R2) a generic bias circuit for the amplifier shown below to establish a drain current ID=4 mA operating in the saturation region. The transistor has a kn= 2 mA/V^2 and a threshold voltage Vt = 1 V. For the DC design you may assume the channel length modulation is negligible).

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Design (find RD, RS, R1, R2) a generic bias circuit for the amplifier shown below to establish a drain current ID=4 mA operating in the saturation region. The transistor has a kn= 2 mA/V^2 and a threshold voltage Vt = 1 V. For the DC design you may assume the channel length modulation is negligible).

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Consider MOSFET-based current source circuits shown below. Assume that the n-type MOSFET transistors follow the long-channel model with μnCox = 100 μA/V2 and Vth,n = 0.5 V. All the transistors have a fixed channel length L = 0.25 μm. The bias voltage VB1 is at 0.8 V. Assume that all transistors have no back-bias effect. (1) (2) (a) For a basic current source in Fig. (1), size the NMOS transistor M1's width ( = W1) so that it conducts a current of 1 mA when it operates in saturation region. You may assume λn = 0. (b) What is the minimum value of Vout for this circuit that keeps M1 in saturation region? (c) For a cascode current source in Fig. (2), assume that the transistor M2 has the same width with M1 you determined from part (a). Determine the value of VB2 that yields the lowest minimum VOUT keeping both M1 and M2 in saturation regions. (d) Now, let's assume that the transistors M1 and M2 have a finite output resistance with λn = 0.1 V−1. Compute the value of the output resistance (Rout) of this cascode current source when M1 and M2 are in the saturation region. (Hint: Calculate the output impedance in a small signal equivalent circuit.)
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For the circuit shown below, let's assume M1 and M2 are operating in saturation mode, with a drain current of ID = 198 μA. We further assume that the transconductance for M1 is gm1 = 3.3 mS and for M2 it is gm2 = 3.9 mS. The channel-length modulation parameters for the two transistors are λ1 = 0.026 V-1 and λ2 = 0.017 V-1. What is the small-signal voltage gain of the circuit? Give your answer to 0 decimal place.
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Current Mirrors (35 points) This problem introduces current mirrors, which will be covered in more details in future lectures. Consider the circuit shown below (Figure 2). (W/L)1 = 1, (W/L)2 = 5, Rref = 50 kΩ, ignore channel length modulation unless otherwise stated. Assume L1 = L2 = 1 μm. Figure 2 a) (5 points) Assume RL = 10 kΩ. Calculate IL, the current flowing through RL. What is the current mirroring ratio ( IL over Iref , where Iref is the current through Rref )? We want the current mirror to provide a load-independent current as much as possible, so check that M2 is in saturation. b) (5 points) Determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio you calculated in part a). Hint: for the current mirror to function as desired, transistor saturation should be maintained. c) (5 points) Channel length modulation introduces load-dependent errors in the mirroring ratio. Using λ = 0.1 V−1 for L = 1 μm, estimate the percentage error in the mirroring ratio. Here, set RL to its maximum value you got in part b ), and assume that we want the same IL as in parts a) and b). Hint: what should be the new VX and Iref ? d) (4 points) Compute the output resistance, Rout, , looking into the drain of M2. Use λ = 0.1 V−1 and assume the same IL as in parts a) through c). e) (5 points) Now consider redesigning the previous current mirror with source-degenerated transistors as shown in Figure 3. Ignore channel length modulation and body effect ( Assume bulk is tied to source). Transistor sizes remain the same, (WL)1 = 1 and (WL)2 = 5. This circuit has been designed to have the same Iref as in part a). What should the value of Rs2 be if we want the same current mirroring ratio as in a)? f) (5 points) Similarly to part b, determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio as in part e). g) (4 points) Now compute the output resistance, Rout , looking into the drain of M2 (using λ = 0.1 V−1 ). Assume IL as used in parts e) and f ). h) (2 points) Comparing the minimum output voltage and the output resistance of these two current mirrors, comment on the advantages and disadvantages of using source degeneration in a current mirror. Figure 3 Current Mirrors (35 points) This problem introduces current mirrors, which will be covered in more details in future lectures. Consider the circuit shown below (Figure 2). (W/L)1 = 1, (W/L)2 = 5, Rref = 50 kΩ, ignore channel length modulation unless otherwise stated. Assume L1 = L2 = 1 μm. Figure 2 a) (5 points) Assume RL = 10 kΩ. Calculate IL, the current flowing through RL. What is the current mirroring ratio ( IL over Iref , where Iref is the current through Rref )? We want the current mirror to provide a load-independent current as much as possible, so check that M2 is in saturation. b) (5 points) Determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio you calculated in part a). Hint: for the current mirror to function as desired, transistor saturation should be maintained. c) (5 points) Channel length modulation introduces load-dependent errors in the mirroring ratio. Using λ = 0.1 V−1 for L = 1 μm, estimate the percentage error in the mirroring ratio. Here, set RL to its maximum value you got in part b ), and assume that we want the same IL as in parts a) and b). Hint: what should be the new VX and Iref ? d) (4 points) Compute the output resistance, Rout, , looking into the drain of M2. Use λ = 0.1 V−1 and assume the same IL as in parts a) through c). e) (5 points) Now consider redesigning the previous current mirror with source-degenerated transistors as shown in Figure 3. Ignore channel length modulation and body effect ( Assume bulk is tied to source). Transistor sizes remain the same, (WL)1 = 1 and (WL)2 = 5. This circuit has been designed to have the same Iref as in part a). What should the value of Rs2 be if we want the same current mirroring ratio as in a)? f) (5 points) Similarly to part b, determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio as in part e). g) (4 points) Now compute the output resistance, Rout , looking into the drain of M2 (using λ = 0.1 V−1 ). Assume IL as used in parts e) and f ). h) (2 points) Comparing the minimum output voltage and the output resistance of these two current mirrors, comment on the advantages and disadvantages of using source degeneration in a current mirror. Figure 3

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