Design Parameter VDD = 1.8 V, μnCox = 100 uA/V2, μpCox = 50 uA/V2, λn

Question

Notify Me Bookmark

Design Parameter VDD = 1.8 V, μnCox = 100 uA/V2, μpCox = 50 uA/V2, λn = 0.1 V−1, λp = 0.2 V−1, VTH, N = 0.4 V, VTH, P = −0.5 V Length = 0.35 um, ID1, 3 = 100 uA, IDREFn 1, 3 = 30 uA, DC voltage of Vin = 1.2 V. Design 1) Design common source amplifier and biasing circuits in the circuit (a) (Determine W/L of transistors and RREF1 and derive the gain) (15 pt) 2) Design common source amplifier and cascode biasing circuits in the circuit (b) (Determine W/L of transistors and RREF2 and derive the gain) (15 pt)

Image text

(a) (b)

Design Parameter

V_{D D} = 1.8 V, μ_{n} C_{o x} = 100 u A / V^{2}, μ_{p} C_{o x} = 50 u A / V^{2}, λ_{n} = 0.1 V^{- 1}, λ_{p} = 0.2 V^{- 1}, V_{T H, N} = 0.4 V, V_{T H, P} = - 0.5 V

Length

= 0.35 u m, I_{D 1, 3} = 100 u A, I_{DREFn 1, 3} = 30 u A, D C

voltage of

V_{in} = 1.2 V

Design

Design common source amplifier and biasing circuits in the circuit (a) (Determine W/L of transistors and $R_{R E F 1}$ and derive the gain) (15pt)
Design common source amplifier and cascode biasing circuits in the circuit (b) ((Determine $W / L$ of transistors and $R_{R E F 2}$ and derive the gain) (15pt)