Design the above circuit to provide an output current of 100uA. Use VDD = 1.3V, and assume the PMOS transistor to be identical and have upCox = 128uA/V^2, Vtp = -0.4V, and |VA| = 3V. The current source is to have Vov = 0.2V, and specify the values of transistor W/L ratios and VG3 and VG4. What is the highest allowable voltage at the output? What is the value of Ro?
You'll get a detailed, step-by-step and expert verified solution.