Design the circuit of figure below, so that the transistor operates in Saturation with Id = 0.5 mA and Vd = +3 V Let the NMOS transistor have Vt = 1 V and kn’(W/L) = 1.5 mA/V2 assume x = 0. What is the largest value that RD can have while maintaining Saturation region operation? Calculate Vgs and Vs for the parameter value given.
Image text
Design the circuit of figure below, so that the transistor operates in Saturation with Id = 0.5 mA and Vd = +3 V Let the NMOS transistor have Vt = 1 V and kn’(W/L) = 1.5 mA/V2 assume x = 0. What is the largest value that RD can have while maintaining Saturation region operation? Calculate Vgs and Vs for the parameter value given.
