Design the presented circuit, calculating the appropriate values for RD and RS to ensure the transistor functions with a drain current (ID) of 0.4 mA and a drain voltage (VD) of +0.5 V. Consider an NMOS transistor characterized by a threshold voltage (Vt) of 0.7 V, a mobility-capacitance product (μnCox) of 100 μA/V2, a channel length (L) of 1 μm, and a width (W) of 32 μm. Ignore the channel-length modulation effect by assuming λ = 0.