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Determine the rise and fall time of Inverter, designed using the following transistor parameters. pMOS Vtp = -0.6 V upCox = 200 uA/V2 (W/L)p = 5 nMOS Vtn = 0.6 V unCox = 500 uA/V2 (W/L)n = 2 VDD = 1.5 V Use the following two cases when calculating average current and determine the difference in the rise and fall time between the following two cases. Case#1: Use 90%, 50%, and 10% Case#2: Use 90% and 10%

Determine the rise and fall time of Inverter, designed using the following transistor parameters. pMOS Vtp = -0.6 V upCox = 200 uA/V2 (W/L)p = 5 nMOS Vtn = 0.6 V unCox = 500 uA/V2 (W/L)n = 2 VDD = 1.5 V Use the following two cases when calculating average current and determine the difference in the rise and fall time between the following two cases. Case#1: Use 90%, 50%, and 10% Case#2: Use 90% and 10%

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Determine the rise and fall time of Inverter, designed using the following transistor parameters. pMOS Vtp = -0.6 V upCox = 200 uA/V2 (W/L)p = 5 nMOS Vtn = 0.6 V unCox = 500 uA/V2 (W/L)n = 2 VDD = 1.5 V Use the following two cases when calculating average current and determine the difference in the rise and fall time between the following two cases. Case#1: Use 90%, 50%, and 10% Case#2: Use 90% and 10%

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(a) Determine the switching threshold (Vth) of Inverter, 2-input NAND (NAND2), 3input NAND (NAND3), 2-input NOR (NOR2), and 3-input NOR (NOR3). Use the transistor parameters given above. (10 Marks) (b) Now, we want to make Vth of the above gates identical to Vth of Inverter. Determine the new transistor sizes of the above logic gates. (10 Marks) (c) Figure 1 is designed using the above device parameters. Determine VIH, VIL, Vth, and the noise margin of the 2-input NOR gate and the inverter using the equivalent device sizes of the best case. Assume VOH is 90% of VDD and VOL is 10% of VDD. (10 Marks) (d) Explain how to make the noise margins of the above NOR2 balanced for logic ' 0 ' and ' 1 '. (10 Marks) The parameters of the pMOS and nMOS transistors are given below: pMOS Vtp = -0.6 V upCox = 200 uA/V2 (W/L)p = 5 nMOS Vtn = 0.6 V unCox = 500 uA/V2 (W/L)n = 2 VDD = 1.5 V

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The parameters of the pMOS and nMOS transistors are given below: pMOS Vtp = -0.5 V Vtn = 0.5 V upCox = 200 uA/V2 (W/L)p=5 nMOS unCox = 500 uA/V2 (W/L)n=2 VDD = 1.5 V (a) Calculate the rise and fall time of the transmission gate in Figure 2.
Solution
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(a) Calculate the rise and fall time of the transmission gate in Figure 2. (b) How can you make the rise and fall time of the transmission gate identical? 3. The parameters of the pMOS and nMOS transistors are given below: pMOS Vtp = -0.5 V Vtn = 0.5 V upCox = 200 uA/V2 (W/L)p=5 nMOS unCox = 500 uA/V2 (W/L)n=2 VDD = 1.5 V

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