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FETS can be used to either pull an output high or to pull it low, but NFETs are generally better in digital applications for pulling outputs low and PFETs for pulling outputs high. Consider an NFET with characteristics: kn′ = 115 μA/V2, VT0 = 0.43 V, λ = 0.06 V−1, VDSAT = 0.6 V, W L = 2, and a supply voltage of Vdd = 2.0 V.

FETS can be used to either pull an output high or to pull it low, but NFETs are generally better in digital applications for pulling outputs low and PFETs for pulling outputs high. Consider an NFET with characteristics: kn′ = 115 μA/V2, VT0 = 0.43 V, λ = 0.06 V−1, VDSAT = 0.6 V, W L = 2, and a supply voltage of Vdd = 2.0 V.

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  1. (35 points) FETS can be used to either pull an output high or to pull it low, but NFETs are generally better in digital applications for pulling outputs low and PFETs for pulling outputs high. Consider an NFET with characteristics: k n ′ = 115 μ A / V 2 , V T 0 = 0.43 V , λ = 0.06 V − 1 , V D S A T = 0.6 V , W L = 2 , and a supply voltage of V d d = 2.0 V .

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FETS can be used to either pull an output high or to pull it low, but NFETs are generally better in digital applications for pulling outputs low and PFETs for pulling outputs high. Consider an NFET with characteristics: kn′ = 115 μA/V2, VT0 = 0.43 V, λ = 0.06 V−1, VDSAT = 0.6 V, W/L = 2, and a supply voltage of Vdd = 2.0 V, Vin = 2.0V. a. Say the NFET is used to pull a capacitor high. i. How high can the NFET pull the output voltage and still be turned "on"? ii. Consider the output voltage in question (i) as Vmax. When the output voltage is within 0.1 V of its maximum(ie, Vout = Vmax−0.1 ), what state is the NFET in (saturation, cut-off, linear)? iii. What is the current, approximately, through the NFET when Vout = Vmax −0.1?
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FETs can be used to either pull an output high or to pull it low, but NFETs are generally better in digital applications for pulling outputs low and PFETs for pulling outputs high. Consider an NFET with characteristics: NMOS: kn′ = 115 μA/V2, VT0 = 0.43 V, λ = 0.06 V−1, VDSAT = 0.6 V, W/L = 2, and a supply voltage of Vdd = 2.0 V. Say the NFET is used to pull a capacitor high: (a) How low can the NFET pull the output voltage and still be turned "on"? (b) Considering your answer to part (a) above, what is the highest output voltage, Vout , max that will be seen using an NFET as a pull-up? (c) When the output voltage is within 0.1 V of its maximum, Vout = Vout,max − 0.1, what state is the NFET in (saturation, cut-off, linear)? (d) What is the current, approximately, through the NFET when Vout = Vout,max − 0.1 ?

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Determine the mode of operation (saturation, linear, or cutoff) and drain current ID for each of the biasing configurations given below. Use the following transistor data: NMOS: kn′ = 115 μA/V2, VT0 = 0.43 V, λ = 0.06 V−1 PMOS: kp′ = 30 μA/V2, VT0 = −0.4 V, λ = −0.1 V−1. Assume (W/L) = 1 and long-channel transistor models. a. NMOS: VGS = 2.5 V, VDS = 2.5 V PMOS: VGS = −0.5 V, VDS = −1.25 V. b. NMOS: VGS = 3.3 V, VDS = 2.2 V PMOS: VGS = −2.5 V, VDS = −1.8 V. c. NMOS:VGS = 0.6 V, VDS = 0.1 V PMOS: VGS = −2.5 V, VDS = −0.7 V.
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