For an NMOS Common-Source (CS) amplifier, ID is dc biased at 1 mA and the overdrive voltage is 0.2 V. For the small-signal equivalent circuit of the CS amplifier shown in the below figure, an overall voltage gain is found to be −10 V/V without RL. What value should a resistance RL inserted in the drain lead have to reduce the overall voltage gain to −5 V/V?
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