For the following figure please determine the sizes of 2nd and 3rd stage inverters to that the delay is minimized. What is this minimum delay value in terms of the internal delay of first inverter? (Please assume γ = 1). Can you reduce this delay by adding inverters after the 3rd stage?

For the following figure please determine the sizes of 2nd and 3rd stage inverters to that the delay is minimized. What is this minimum delay value in terms of the internal delay of first inverter? (Please assume γ = 1). Can you reduce this delay by adding inverters after the 3rd stage?

 

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For the following figure please determine the sizes of 2nd and 3rd stage inverters to that the delay is minimized. What is this minimum delay value in terms of the internal delay of first inverter? (Please assume γ = 1). Can you reduce this delay by adding inverters after the 3rd stage?

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