Question

Notify Me Bookmark

For the following pseudo NMOS circuit, find the value of r, so that NMH is 50% of VDD. Also find the value of VoL and the current flowing through QN when output is at its lowest value. Use the following values for your calculation: VDD = 10 V, IVt| = 1.5 V, kn'(W/L) = 1 mA/V2 b. Sketch the following function in pseudo NMOS technology. F = (AB)_bar + AB

For the following pseudo NMOS circuit, find the value of r, so that NMH is 50% of VDD. Also find the value of VoL and the current flowing through QN when output is at its lowest value. Use the following values for your calculation: VDD = 10 V, IVt| = 1.5 V, kn'(W/L) = 1 mA/V2 b. Sketch the following function in pseudo NMOS technology. F = (AB)_bar + AB

Image text
For the following pseudo NMOS circuit, find the value of r, so that NMH is 50% of VDD. Also find the value of VoL and the current flowing through QN when output is at its lowest value. Use the following values for your calculation: VDD = 10 V, IVt| = 1.5 V, kn'(W/L) = 1 mA/V2 b. Sketch the following function in pseudo NMOS technology. F = (AB)_bar + AB

Detailed Answer

0 0

Please enter your email here. You will get email when this question is answered by our tutor.

Answer
Doubtrix Logo

This Problem has been solved!

You'll get a detailed, step-by-step and expert verified solution.

Join Doubtrix with 7-days free trial

  • Icon Correct & Verified Answers
  • Icon No AI-Generated Answers
  • Icon Video Solution for Difficult Questions
  • Icon Work With Experts to Reach at Correct Answers
Login Sign Up

Similar/Related Questions

Consider a standard CMOS inverter with QN and QP matched and with the input vi rising slowly from 0 to VDD. At what value of vi does the current flowing through QN and QP reach its peak? Give an expression for the peak current, neglecting λn and λp. For kn’ = 500 μA/V2, (W/L)n = 1.5, VDD = 1.3 V, and Vtn = 0.4 V, find the value of the peak current. (Hint: Max current is during switching when for a brief moment, both transistors are in the saturation mode and "half on").
Solution
2 0

Consider the CMOS inverter of Fig. 14.22 with QN and QP matched and with the input vI rising slowly from 0 to VDD. At what value of vI does the current flowing through QN and QP reach its peak? Give an expression for the peak current, neglecting λn and λp. For k’n = 500 μA/V2 , (W/L)n = 1.5, VDD = 1.3 V, and Vtn = 0.4V, find the value of the peak current.
Solution
2 0

Current Mirrors (35 points) This problem introduces current mirrors, which will be covered in more details in future lectures. Consider the circuit shown below (Figure 2). (W/L)1 = 1, (W/L)2 = 5, Rref = 50 kΩ, ignore channel length modulation unless otherwise stated. Assume L1 = L2 = 1 μm. Figure 2 a) (5 points) Assume RL = 10 kΩ. Calculate IL, the current flowing through RL. What is the current mirroring ratio ( IL over Iref , where Iref is the current through Rref )? We want the current mirror to provide a load-independent current as much as possible, so check that M2 is in saturation. b) (5 points) Determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio you calculated in part a). Hint: for the current mirror to function as desired, transistor saturation should be maintained. c) (5 points) Channel length modulation introduces load-dependent errors in the mirroring ratio. Using λ = 0.1 V−1 for L = 1 μm, estimate the percentage error in the mirroring ratio. Here, set RL to its maximum value you got in part b ), and assume that we want the same IL as in parts a) and b). Hint: what should be the new VX and Iref ? d) (4 points) Compute the output resistance, Rout, , looking into the drain of M2. Use λ = 0.1 V−1 and assume the same IL as in parts a) through c). e) (5 points) Now consider redesigning the previous current mirror with source-degenerated transistors as shown in Figure 3. Ignore channel length modulation and body effect ( Assume bulk is tied to source). Transistor sizes remain the same, (WL)1 = 1 and (WL)2 = 5. This circuit has been designed to have the same Iref as in part a). What should the value of Rs2 be if we want the same current mirroring ratio as in a)? f) (5 points) Similarly to part b, determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio as in part e). g) (4 points) Now compute the output resistance, Rout , looking into the drain of M2 (using λ = 0.1 V−1 ). Assume IL as used in parts e) and f ). h) (2 points) Comparing the minimum output voltage and the output resistance of these two current mirrors, comment on the advantages and disadvantages of using source degeneration in a current mirror. Figure 3 Current Mirrors (35 points) This problem introduces current mirrors, which will be covered in more details in future lectures. Consider the circuit shown below (Figure 2). (W/L)1 = 1, (W/L)2 = 5, Rref = 50 kΩ, ignore channel length modulation unless otherwise stated. Assume L1 = L2 = 1 μm. Figure 2 a) (5 points) Assume RL = 10 kΩ. Calculate IL, the current flowing through RL. What is the current mirroring ratio ( IL over Iref , where Iref is the current through Rref )? We want the current mirror to provide a load-independent current as much as possible, so check that M2 is in saturation. b) (5 points) Determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio you calculated in part a). Hint: for the current mirror to function as desired, transistor saturation should be maintained. c) (5 points) Channel length modulation introduces load-dependent errors in the mirroring ratio. Using λ = 0.1 V−1 for L = 1 μm, estimate the percentage error in the mirroring ratio. Here, set RL to its maximum value you got in part b ), and assume that we want the same IL as in parts a) and b). Hint: what should be the new VX and Iref ? d) (4 points) Compute the output resistance, Rout, , looking into the drain of M2. Use λ = 0.1 V−1 and assume the same IL as in parts a) through c). e) (5 points) Now consider redesigning the previous current mirror with source-degenerated transistors as shown in Figure 3. Ignore channel length modulation and body effect ( Assume bulk is tied to source). Transistor sizes remain the same, (WL)1 = 1 and (WL)2 = 5. This circuit has been designed to have the same Iref as in part a). What should the value of Rs2 be if we want the same current mirroring ratio as in a)? f) (5 points) Similarly to part b, determine the maximum RL and minimum VOut such that the current mirror still functions with the same current mirroring ratio as in part e). g) (4 points) Now compute the output resistance, Rout , looking into the drain of M2 (using λ = 0.1 V−1 ). Assume IL as used in parts e) and f ). h) (2 points) Comparing the minimum output voltage and the output resistance of these two current mirrors, comment on the advantages and disadvantages of using source degeneration in a current mirror. Figure 3

Solution
0 0