Question

Notify Me Bookmark

Given the following circuit: Assuming D1 is ON and D2 is OFF, with Vs1 = 12.3 V, Vs2 = 1.4 V, R1 = 2.2 kΩ, R2 = 6.5 kΩ, then the current going through R2 is equal to: Use the CVD model for the diode, with VD = 0.7 V a. 0.001785 A b. 0.001414 A c. 0 A d. 1.172414 A e. 0.001333 A

Given the following circuit: Assuming D1 is ON and D2 is OFF, with Vs1 = 12.3 V, Vs2 = 1.4 V, R1 = 2.2 kΩ, R2 = 6.5 kΩ, then the current going through R2 is equal to: Use the CVD model for the diode, with VD = 0.7 V a. 0.001785 A b. 0.001414 A c. 0 A d. 1.172414 A e. 0.001333 A

Image text
Given the following circuit: Assuming D1 is ON and D2 is OFF, with Vs1 = 12.3 V, Vs2 = 1.4 V, R1 = 2.2 kΩ, R2 = 6.5 kΩ, then the current going through R2 is equal to: Use the CVD model for the diode, with VD = 0.7 V a. 0.001785 A b. 0.001414 A c. 0 A d. 1.172414 A e. 0.001333 A

Detailed Answer

0 0

Please enter your email here. You will get email when this question is answered by our tutor.

Doubtrix Logo

Problem is not yet solved!

Click on Notify me to get email when question is answered.

Join Doubtrix with 7-days free trial

  • Icon Correct & Verified Answers
  • Icon No AI-Generated Answers
  • Icon Video Solution for Difficult Questions
  • Icon Work With Experts to Reach at Correct Answers
Notify me Login Sign Up

Similar/Related Questions

Given the following circuit with VDD = 6.6 V, R = 3.2 kΩ, then the current I is: Use the CVD model for the diode, with VD = 0.65 V. a. 0.002062 A b. 2.062500 A c. 1.859375 A d. 0 A e. 0.001859 A
Solution
3 0

Figure 3 Figure 3 shows an amplifier with a current mirror as an active load. The MOSFETs have the following parameters: Vtn = −Vt = 0.6 V, kn′ = 200 μA/V2, kp′ = 65 μA/V2, VA(MMOS) = 20 V, VA(PMOS) = −10 V, VT = 26 mV, R1 = 7 kΩ, R2 = 10 kΩ, L = 0.4 μm and W = 4 μm. The base-emitter forward voltage, VBE, of transistor Q4 is 0.7 V. The forward voltage drop for both D1 and D2 is 0.7 V. The supply voltage, VDO = 3 V. Assume the base current of Q4 is negligible compared to the emitter and collector currents of Q4, with all the transistors biased in the active region. a. ) Given that ID = k′(WL)(VGS − Vt)2, calculate the gate to source voltage of Q1. b. ) Calculate the small-signal voltage gain, vout/vin. .

Solution
0 0

For the common-emitter amplifier shown in Figure 1 , let VCC = 9 V, R1 = 27 kΩ, R2 = 15 kΩ, RE = 1.2 kΩ, and RC = 2.2 kΩ. The transistor has β = 100, VT = 25 mV, VA = ∞ and VBE = 0.7 V. Calculate the DC bias current IE. If the amplifier operates between a source for which RS = 10 kΩ and a load of 2 kΩ, replace the transistor with its hybrid- π model, and find the values of Ri and the voltage gain v0/vs. Figure 1
Solution
0 0