In the above figure, v1 is a square wave, ranging from 0 to VDD at frequency fCLK. How much power is dissipated in a CMOS integrated circuit containing the equivalent of 500 Million of the above inverters if we assume that 98% of the inverters are static and the other 2% are switching at a clock rate of 1GHz? 225 W 1.13 kW 30 W 450 mW 45 W Electrically-matched devices Kn = Kp = 10 μA/V2 VTN = -VTP = 300 mV λn = λp = 0 V-1
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In the above figure, v1 is a square wave, ranging from 0 to VDD at frequency fCLK. How much power is dissipated in a CMOS integrated circuit containing the equivalent of 500 Million of the above inverters if we assume that 98% of the inverters are static and the other 2% are switching at a clock rate of 1GHz? 225 W 1.13 kW 30 W 450 mW 45 W Electrically-matched devices Kn = Kp = 10 μA/V2 VTN = -VTP = 300 mV λn = λp = 0 V-1
