In the circuit below, the MOSFET has K = 2 mA/V2 and VT = 1 V. The BJT has β = 100. (a) Find the minimum value of VIN for which Q1 will operate in forward active and M1 will operate in saturation. (b) Set VIN = 3 V. Find VOUT and IDS. Draw the small-signal model. (c) Find the small-signal voltage gain A = vout/vin. (d) Find the small-signal input resistance, rin. (e) Find the small-signal output resistance, rout .
![(a) Assume that the MOSFET in Figure 3.1 is operating in saturation and is characterised by a threshold voltage, VT = 1 V. Assume that the parameter, K = 1 mA/V2 where the drain-source current in the MOSFET in saturation is given by the usual expression: iDS = K2(vGS−VT)2 Calculate the output voltage, vo, for the circuit shown in Figure 3.1 when vIN = 2.5 V, Vs = 10 V, and R = 1 kΩ. The correct solution should satisfy both conditions necessary for the device to operate in saturation. Figure 2.1 [10 marks] (b) For the circuit in Figure 2.1, calculate the small signal voltage gain of the circuit, Av, at the operating point defined by the numerical values of part (a). Assume the input and output voltages include small signal components, vin and vout respectively. VIN and Vout correspond to the constant DC components of the input and output voltage from part (a). vIN = VIN +vin vOUT = VOUT +vout Av = vout vin [10 marks] (c) Determine the small signal output impedance at the terminals labelled a and b for the circuit shown in Figure 3.1 and at the operating point defined by the numerical values of part (a). [10 marks]](https://www.doubtrix.com/uploads/editor/3475428305cJOidAHSIp.jpg)
![[20%] The circuit below is a BJT differential amplifier with VCC = VEE = 3 V. The DC current source IEE is assumed ideal. The two transistors are identical, operate in the active region, and have α = 0.99 and VA = ∞. The thermal voltage VT is 26 mV at room temperature. The input is purely differential, i. e. , vip = −vim = vid/2 a) Draw small-signal differential-mode half circuits of the differential amplifier. ( 5%) b) Express the differential voltage gain Ad, which is defined as (vop−vom)/vid, in terms of IEE, RL, α and VT⋅(6%) c) If IEE = 2 mA, what should be the value of RL to achieve Ad = 40 ? (4%) d) Choose another set of IEE and RL to maintain Ad = 40 while reducing the power consumption by half compared to the situation in part c). (2%) e) What is the maximum Ad that the circuit can achieve if the DC levels at the output nodes vop and vom must be equal to or higher than 0 V? (3%)](https://www.doubtrix.com/uploads/editor/8985993089jYTQXcfJDH.png)