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Let Vt = 1 V, kn’(W/L) = 1 mA/V2, Vsig is an AC source. MOSFET-1 has DC values: VGS = 3 V, ID = 2 mA, MOSFET-2 has DC values: VGS = 5 V, IDD = 8 mA. λ = 0 (for all transistors) and assume all transistors are saturated. For the following small-signal equivalent circuit, find the following values: (a) Rin (b) Rout (c) Voltage gain: Vo/Vsig

Let Vt = 1 V, kn’(W/L) = 1 mA/V2, Vsig is an AC source. MOSFET-1 has DC values: VGS = 3 V, ID = 2 mA, MOSFET-2 has DC values: VGS = 5 V, IDD = 8 mA. λ = 0 (for all transistors) and assume all transistors are saturated. For the following small-signal equivalent circuit, find the following values: (a) Rin (b) Rout (c) Voltage gain: Vo/Vsig

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Let Vt = 1 V, kn’(W/L) = 1 mA/V2, Vsig is an AC source. MOSFET-1 has DC values: VGS = 3 V, ID = 2 mA, MOSFET-2 has DC values: VGS = 5 V, IDD = 8 mA. λ = 0 (for all transistors) and assume all transistors are saturated. For the following small-signal equivalent circuit, find the following values: (a) Rin (b) Rout (c) Voltage gain: Vo/Vsig

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Use: Vt = 2 V (Note: Vt is the threshold voltage of the MOSFET.) kn’(W/L) = 3 mA/V2 Vsig is an AC source MOSFET-1 has DC values: VGS = 4 V,ID = 6 mA MOSFET-2 has DC values: VGS = 5.3 V, ID = 16.7 mA λ = 0 (for all transistors) Assume all MOSFETs are biased in saturation region. For the following small-signal equivalent circuit, find the following values: (a) Rin (b) Rout (c) Voltage gain: Vo/Vsig

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Figure P7.33 shows a discrete-circuit amplifier. The input signal vsig is coupled to the gate through a very large capacitor (shown as infinite). The transistor source is connected to ground at signal frequencies via a very large capacitor (shown as infinite). The output voltage signal that develops at the drain is coupled to a load resistance via a very large capacitor (shown as infinite). All capacitors behave as short circuits for signals and as open circuits for dc. (a) If the transistor has Vt = 1 V, and kn = 4 mA/V2 , verify that the bias circuit establishes VGS = 1.5 V, ID = 0.5 mA, and VD = +7.0 V. That is, assume these values, and verify that they are consistent with the values of the circuit components and the device parameters. (b) Find gm and ro if VA = 100 V. (c) Draw a complete small-signal equivalent circuit for the amplifier, assuming all capacitors behave as short circuits at signal frequencies. (d) Find Rin, vgs/vsig, vo/vgs, and vo/vsig.

Figure P7.33 shows a discrete-circuit amplifier. The input signal vsig is coupled to the gate through a very large capacitor (shown as infinite). The transistor source is connected to ground at signal frequencies via a very large capacitor (shown as infinite). The output voltage signal that develops at the drain is coupled to a load resistance via a very large capacitor (shown as infinite). All capacitors behave as short circuits for signals and as open circuits for dc. (a) If the transistor has Vt = 1 V, and kn = 4 mA/V2 , verify that the bias circuit establishes VGS = 1.5 V, ID = 0.5 mA, and VD = +7.0 V. That is, assume these values, and verify that they are consistent with the values of the circuit components and the device parameters. (b) Find gm and ro if VA = 100 V. (c) Draw a complete small-signal equivalent circuit for the amplifier, assuming all capacitors behave as short circuits at signal frequencies. (d) Find Rin, vgs/vsig, vo/vgs, and vo/vsig.
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