Q2. The following circuits use MOS transistors with the following parameters; Vtnn = 0.4 V, VTp = −0.4 V, kn = 400 μA/V2 and kp = 100 μA/V2. Assume λ = γ = 0. (8 pts) For the circuit in Fig. 2 assume W/L = 5/1 and R = 2kΩ. The reference current, Iref , and drain-source voltage VDS, are; a) 2.5 mA, 0.5 V b) 0.65 mA, 1.5 c) 0.8 mA, 1.2 V d) 0.65 mA, 1.2 V e) None of the above Fig. 2 MOSFET Bias Circuit

Q2. The following circuits use MOS transistors with the following parameters; Vtnn = 0.4 V, VTp = −0.4 V, kn = 400 μA/V2 and kp = 100 μA/V2. Assume λ = γ = 0. (8 pts) For the circuit in Fig. 2 assume W/L = 5/1 and R = 2kΩ. The reference current, Iref , and drain-source voltage VDS, are; a) 2.5 mA, 0.5 V b) 0.65 mA, 1.5 c) 0.8 mA, 1.2 V d) 0.65 mA, 1.2 V e) None of the above Fig. 2 MOSFET Bias Circuit

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V d d = 2.5 V
Q2. The following circuits use MOS transistors parameters; V t n n = 0.4 V , V T p = 0.4 V , and k p = 100 μ A / V 2 . Assume λ = γ = 0 . ( 8 pts)
  1. For the circuit in Fig. 2 assume W/L= The reference current, I rff , and drain V D s , are; a) 2.5 m A , 0.5 V b) 0.65 m A , 1.5 c) 0.8 m A , 1.2 V d) 0.65 m A , 1.2 V Fig. 2 MOSFET Bias Circuit e) None of the above

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