Question 4. [6] You are required to design the smallest SRAM cell satisfying the read stability and writability requirements in a 0.13 μm process. The process parameters are given below. Assume Lmin = 2 λ, and Wmin = 4 λ. Kn′ = 3 Kp′ = 300 μANVtn = |Vtp | = 0.4 VVDD = 1.2 VCdμ = Cgμ = 1 fF/μm a) [4] What are the widths of M1, M3, and M5 if only integer transistor W/L ratios are allowed? W1 = W3 = W5 =