Question 4. [6] You are required to design the smallest SRAM cell satisfying the read stability and writability requirements in a 0.13 μm process. The process parameters are given below. Assume Lmin = 2 λ, and Wmin = 4 λ. Kn′ = 3 Kp′ = 300 μANVtn = |Vtp | = 0.4 VVDD = 1.2 VCdμ = Cgμ = 1 fF/μm a) [4] What are the widths of M1, M3, and M5 if only integer transistor W/L ratios are allowed? W1 = W3 = W5 =

Question 4. [6] You are required to design the smallest SRAM cell satisfying the read stability and writability requirements in a 0.13 μm process. The process parameters are given below. Assume Lmin = 2 λ, and Wmin = 4 λ. Kn′ = 3 Kp′ = 300 μANVtn = |Vtp | = 0.4 VVDD = 1.2 VCdμ = Cgμ = 1 fF/μm a) [4] What are the widths of M1, M3, and M5 if only integer transistor W/L ratios are allowed? W1 = W3 = W5 =

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Question 4. [6] You are required to design the smallest SRAM cell satisfying the read stability and writability requirements in a 0.13 μ m process. The process parameters are given below. Assume L min = 2 λ , and W min = 4 λ .
  • K n = 3 K p = 300 μ A N
  • V tn = | V tp | = 0.4 V
  • V D D = 1.2 V
  • C d μ = C g μ = 1 f F / μ m a) [4] What are the widths of M 1 , M 3 , and M 5 if only integer transistor W/L ratios are allowed?
W 1 = W 3 = W 5 =

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