Size the transistors in the shown logic gate, so that tPHL = 30 ps and tPLH = 106 ps. The gate is connected to external load of 80fF.
All transistors have minimum length L = 2λ = 0.25 um.
Use the following values for the transistor resistances: Rsq,n = 13 kΩ and Rsq,p = 31 kΩ.
Neglect the capacitances at the internal nodes and assume that the external load capacitance is much greater than the transistor capacitances.
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Size the transistors in the shown logic gate, so that tPHL = 30 ps and tPLH = 106 ps. The gate is connected to external load of 80fF.
All transistors have minimum length L = 2λ = 0.25 um.
Use the following values for the transistor resistances: Rsq,n = 13 kΩ and Rsq,p = 31 kΩ.
Neglect the capacitances at the internal nodes and assume that the external load capacitance is much greater than the transistor capacitances.
